2-stack 1D-1R Cross-point Structure with Oxide Diodes as Switch Elements for High Density Resistance RAM Applications (English)
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In:
2007 IEEE International Electron Devices Meeting
;
771-774
;
2007
- Conference paper / Electronic Resource
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Title:2-stack 1D-1R Cross-point Structure with Oxide Diodes as Switch Elements for High Density Resistance RAM Applications
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Contributors:Lee, Myoung-Jae ( author ) / Park, Youngsoo ( author ) / Kang, Bo-Soo ( author ) / Ahn, Seung-Eon ( author ) / Lee, Changbum ( author ) / Kim, Kihwan ( author ) / Xianyu, Wenxu. ( author ) / Stefanovich, G. ( author ) / Lee, Jung-Hyun ( author ) / Chung, Seok-Jae ( author )
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Published in:
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Publisher:
- New search for: IEEE
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Publication date:2007-12-01
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Size:4112052 byte
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ISBN:
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DOI:
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Type of media:Conference paper
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Type of material:Electronic Resource
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Language:English
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Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Plenary SessionWong, H.-S. Philip / Brederlow, Ralf et al. | 2007
- 3
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Automotive Electronics - Enabling the future of individual mobilitySchmidt, Claus et al. | 2007
- 9
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Roles of Quantum Nanostructures on the Evolution and Future Advances of Electronic and Photonic DevicesSakaki, Hiroyuki et al. | 2007
- 17
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Combining Digital Optical MEMS, CMOS and Algorithms for Unique Display SolutionsHornbeck, Larry J. et al. | 2007
- 25
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Integrated Circuits & Manufacturing - DRAM and Fuse TechnologyMatsui, Yuichi / Hamamoto, Takeshi et al. | 2007
- 27
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Memory Technologies for sub-40nm NodeKim, Kinam / Jeong, Gitae et al. | 2007
- 31
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A novel cell arrangement enabling Trench DRAM scaling to 40nm and beyondHeineck, L. / Graf, W. / Popp, M. / Savignac, D. / Moll, H.-P. / Tews, R. / Temmler, D. / Kar, G. / Schmid, J. / Rouhanian, M. et al. | 2007
- 35
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High performance Silicon-On-ONO (SOONO) Cell Array Transistors (SCATs) for 512Mb DRAM Cell Array ApplicationKim, Sung Hwan / Bae, Hyun Jun / Hong, Sung In / Choi, Yong Lack / Yoon, Eun Jung / Song, Ho Ju / Oh, Chang Woo / Lee, Yong-Seok / Cho, Hong / Kim, Dong-Won et al. | 2007
- 39
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FBC's Potential of 6F2 Single Cell Operation in Multi-Gbit Memories Confirmed by a Newly Developed Method for Measuring Signal Sense MarginMatsuoka, Fumiyoshi / Ohsawa, Takashi / Higashi, Tomoki / Furuhashi, Hironobu / Hatsuda, Kosuke / Fujita, Katsuyuki / Fukuda, Ryo / Ikumi, Nobuyuki / Shino, Tomoaki / Minami, Yoshihiro et al. | 2007
- 43
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A Novel Via-fuse Technology Featuring Highly Stable Blow Operation with Large On-off Ratio for 32nm Node and BeyondTakaoka, H. / Ueda, T. / Tsuda, H. / Ono, A. et al. | 2007
- 47
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CMOS Devices - Metal Gate & High-K Gate DielectricYoon, Jong Shik / Thean, Aaron et al. | 2007
- 49
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Low VT CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only AnnealKubicek, S. / Schram, T. / Paraschiv, V. / Vos, R. / Demand, M. / Adelmann, C. / Witters, T. / Nyns, L. / Ragnarsson, L.-A. / Yu, H. et al. | 2007
- 53
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Materials Science-based Device Performance Engineering for Metal Gate High-k CMOSToriumi, A. / Kita, K. / Tomida, K. / Zhao, Y. / Widiez, J. / Nabatame, T. / Ota, H. / Hirose, M. et al. | 2007
- 57
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Flexible, simplified CMOS on Si(110) with metal gate / high k for HP and LSTPHarris, H. R. / Thompson, S. E. / Krishnan, S. / Kirsch, P. / Majhi, P. / Smith, C.E. / Hussain, M.M. / Sun, G. / Adhikari, H. / Suthram, S. et al. | 2007
- 61
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Strained FDSOI CMOS technology scalability down to 2.5nm film thickness and 18nm gate length with a TiN/HfO2 gate stackBarral, V. / Poiroux, T. / Andrieu, F. / Buj-Dufournet, C. / Faynot, O. / Ernst, T. / Brevard, L. / Fenouillet-Beranger, C. / Lafond, D. / Hartmann, J.M. et al. | 2007
- 65
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Intrinsic Origin of Electron Mobility Reduction in High-k MOSFETs - From Remote Phonon to Bottom Interface Dipole ScatteringOta, Hiroyuki / Hirano, Akito / Watanabe, Yukimune / Yasuda, Naoki / Iwamoto, Kunihiko / Akiyama, Koji / Okada, Kenji / Migita, Shinji / Nabatame, Toshihide / Toriumi, Akira et al. | 2007
- 69
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Integration Technology of PC-FUSI (Phase Controlled FUSI) / HfSiON Gate Stack for Embedded Memory ApplicationSaitoh, Motofumi / Ogura, Takashi / Masuzaki, Koji / Takahashi, Kensuke / Sunamura, Hiroshi / Manabe, Kenzo / Shirai, Hiroki / Tatsumi, Toru / Watanabe, Hirohito et al. | 2007
- 73
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Solid-State & Nanoelectronic Devices - SONOS and Charge Trapping Memory DevicesSpinelli, Alessandro / Baccarani, Giorgio et al. | 2007
- 75
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15 nm Planar Bulk SONOS-type Memory with Double Junction Tunnel Layers using Sub-threshold Slope ControlOhba, Ryuji / Mitani, Yuichiro / Sugiyama, Naoharu / Fujita, Shinobu et al. | 2007
- 79
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Trap Layer Engineered Gate-All-Around Vertically Stacked Twin Si -Nanowire Nonvolatile MemoryFu, J. / Buddharaju, K. D. / Teo, S. H. G. / Zhu, Chunxiang / Yu, M. B. / Singh, N. / Lo, G. Q. / Balasubramanian, N. / Kwong, D. L. et al. | 2007
- 83
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Novel ZrO2/Si3N4 Dual Charge Storage Layer to Form Step-Up Potential Wells for Highly Reliable Multi-Level Cell ApplicationZhang, Gang / Hwang, Wan Sik / Bobade, Santosh M. / Lee, Seung-Hwan / Cho, Byung-Jin / Yoo, Won Jong et al. | 2007
- 87
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A NAND-type Flash Memory Using Impact Ionization Generated Substrate Hot Electron Programming (≫20MB/sec) and Hot Hole ErasingWu, Jau-Yi / Kuo, Ming-Chang / Hsu, Tzu-Hsuan / Chen, Kuan-Fu / Chen, Yin-Jen / Lai, Erh-Kun / Lee, Ming-Hsiu / Hsieh, Kuang-Yeu / Liu, Rich / Lu, Chih-Yuan et al. | 2007
- 91
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A New Self-Aligned Nitride MTP Cell with 45nm CMOS Fully Compatible ProcessHuang, Chia-En / Chen, Hsin-Ming / Lai, Han-Chao / Chen, Ying-Je / King, Ya-Chin / Lin, Chrong Jung et al. | 2007
- 95
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45nm Gateless Anti-Fuse Cell with CMOS Fully Compatible ProcessTsai, Yi-Hung / Chen, Hsin-Ming / Chiu, Hsin-Yi / Shih, Hung-Sheng / Lai, Han-Chao / King, Ya-Chin / Lin, Chrong Jung et al. | 2007
- 99
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Modeling & Simulation - Performance Analysis And Transport ModelingOldiges, Phil / Linton, Tom et al. | 2007
- 101
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Novel Carrier-Mobility Modeling with Interface States for MOSFETs with Highly Scaled Gate Oxide Based on First-Principles CalculationsIshihara, Takamitsu / Matsushita, Daisuke / Tatsumura, Kosuke / Nakabayashi, Yukio / Koga, Junji / Kato, Koichi et al. | 2007
- 105
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On the experimental determination of channel back-scattering in nanoMOSFETsZilli, M. / Palestri, P. / Esseni, D. / Selmi, L. et al. | 2007
- 109
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Simulation of Electron Transport in High-Mobility MOSFETs: Density of States Bottleneck and Source StarvationFischetti, M. V. / Wang, L. / Yu, B. / Sachs, C. / Asbeck, P. M. / Taur, Y. / Rodwell, M. et al. | 2007
- 113
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Performance Analysis of III-V Materials in a Double-Gate nano-MOSFETCantley, Kurtis D. / Liu, Yang / Pal, Himadri S. / Low, Tony / Ahmed, Shaikh S. / Lundstrom, Mark S. et al. | 2007
- 117
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On the Performance Limit of Impact-Ionization TransistorsShen, C. / Lin, J.-Q. / Toh, E.-H. / Chang, K.-F. / Bai, P. / Heng, C.-H. / Samudra, G. S. / Yeo, Y.-C. et al. | 2007
- 121
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Quantum Transport Simulation of Tunneling Based Spin Torque Transfer (STT) Devices: Design Trade offs and Torque EfficiencySalahuddin, Sayeef / Datta, Deepanjan / Srivastava, Prabhakar / Datta, Supriyo et al. | 2007
- 125
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Process Technology - Advanced Junctions, Silicides and Novel Stress EngineeringKase, Masataka / Murthy, Anand et al. | 2007
- 127
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A New Liner Stressor with Very High Intrinsic Stress (≫ 6 GPa) and Low Permittivity Comprising Diamond-Like Carbon (DLC) for Strained P-Channel TransistorsTan, Kian-Ming / Zhu, Ming / Fang, Wei-Wei / Yang, Mingchu / Liow, Tsung-Yang / Lee, Rinus T. P. / Hoe, Keat Mun / Tung, Chih-Hang / Balasubramanian, N. / Samudra, Ganesh S. et al. | 2007
- 131
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Silicon-Germanium-Tin (SiGeSn) Source and Drain Stressors formed by Sn Implant and Laser Annealing for Strained Silicon-Germanium Channel P-MOSFETsWang, Grace Huiqi / Toh, Eng-Huat / Wang, Xincai / Seng, Debbie Hwee Leng / Tripathy, Sudhinrajan / Osipowicz, Thomas / Chan, Tau Kuei / Hoe, Keat Mun / Balakumar, S. / Tung, Chih Hang et al. | 2007
- 135
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Interfacial Segregation of Metal at NiSi/Si Junction for Novel Dual Silicide TechnologyNishi, Yoshifumi / Tsuchiya, Yoshinori / Kinoshita, Atsuhiro / Yamauchi, Takashi / Koga, Junji et al. | 2007
- 139
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A Novel Low Leakage-Current Ni SALICIDE Process in nMOSFETs on Si(110) SubstrateYamaguchi, T. / Kashihara, K. / Kudo, S. / Hayashi, K. / Hashikawa, N. / Okudaira, T. / Tsutsumi, T. / Maekawa, K. / Oda, H. / Asai, K. et al. | 2007
- 143
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Junction Profile Engineering with a Novel Multiple Laser Spike Annealing Scheme for 45-nm Node High Performance and Low Leakage CMOS TechnologyYamamoto, T. / Kubo, T. / Sukegawa, T. / Takii, E. / Shimamune, Y. / Tamura, N. / Sakoda, T. / Nakamura, M. / Ohta, H. / Miyashita, T. et al. | 2007
- 147
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Low Temperature Implementation of Dopant-Segregated Band-edge Metallic S/D junctions in Thin-Body SOI p-MOSFETsLarrieu, G. / Dubois, E. / Valentin, R. / Breil, N. / Danneville, F. / Dambrine, G. / Raskin, J.P. / Pesant, J.C. et al. | 2007
- 151
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Pushing Planar Bulk CMOSFET Scaling to its Limit by Ultimately Shallow Diffusion-Less JunctionUejima, K. / Yako, K. / Ikarashi, N. / Narihiro, M. / Tanaka, M. / Nagumo, T. / Mineji, A. / Shishiguchi, S. / Hane, M. et al. | 2007
- 155
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CMOS & Interconnect Reliability - Reliability Issues in Non-Volatile Memories and ESDReimbold, Gilles / Gossner, Harald et al. | 2007
- 157
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Reliability issues and scaling projections for phase change non volatile memoriesLacaita, A. L. / Ielmini, D. et al. | 2007
- 161
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Study of Local Trapping and STI Edge Effects on Charge-Trapping NAND FlashLue, Hang-Ting / Hsu, Tzu-Hsuan / Wang, Szu-Yu / Hsiao, Yi-Hsuan / Lai, Erh-Kun / Yang, Ling-Wu / Yang, Tahone / Chen, Kuang-Chao / Hsieh, Kuang-Yeu / Liu, Rich et al. | 2007
- 165
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First evidence for injection statistics accuracy limitations in NAND Flash constant-current Fowler-Nordheim programmingCompagnoni, C. Monzio / Spinelli, A. S. / Gusmeroli, R. / Lacaita, A. L. / Beltrami, S. / Ghetti, A. / Visconti, A. et al. | 2007
- 169
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Random telegraph noise in flash memories - model and technology scalingFukuda, Koichi / Shimizu, Yuui / Amemiya, Kazumi / Kamoshida, Masahiro / Hu, Chenming et al. | 2007
- 173
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Characterization and Monte Carlo Analysis of Secondary Electrons Induced Program Disturb in a Buried Diffusion Bit-line SONOS Flash MemoryTang, Chun-Jung / Li, C.W. / Wang, Tahui / Gu, S.H. / Chen, P.C. / Chang, Y.W. / Lu, T.C. / Lu, W.P. / Chen, K.C. / Lu, Chih-Yuan et al. | 2007
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Modeling and Analysis of Self-Heating in FinFET Devices for Improved Circuit and EOS/ESD PerformanceKolluri, Seshadri / Endo, Kazuhiko / Suzuki, Eiichi / Banerjee, Kaustav et al. | 2007
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A Microscopic Understanding of Nanometer Scale DENMOS Failure Mechanism under ESD ConditionsChatterjee, Amitabh / Pendharkar, Sameer / Lin, Yen-Yi / Duvvury, Charvaka / Banerjee, Kaustav et al. | 2007
- 185
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Solid-State and Nanoelectronic Devices - Non- Classical Devices And InterconnectsGuo, Jing / Chui, Chi On et al. | 2007
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A Perpendicular Spin Torque Switching based MRAM for the 28 nm Technology NodeKlostermann, U.K. / Angerbauer, M. / Gruning, U. / Kreupl, F. / Ruhrig, M. / Dahmani, F. / Kund, M. / Muller, G. et al. | 2007
- 191
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Bended Gate-All-Around Nanowire MOSFET: a device with enhanced carrier mobility due to oxidation-induced tensile stressMoselund, K. E. / Dobrosz, P. / Olsen, S. / Pott, V. / De Michielis, L. / Tsamados, D. / Bouvet, D. / O'Neill, A. / Ionescu, A. M. et al. | 2007
- 195
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Impact Ionization Nanowire Transistor with Multiple-Gates, Silicon-Germanium Impact Ionization Region, and Sub-5 mV/decade Subtheshold SwingToh, Eng-Huat / Wang, Grace Huiqi / Zhu, Ming / Shen, Chen / Chan, Lap / Lo, Guo-Qiang / Tung, Chih-Hung / Sylvester, Dennis / Heng, Chun-Huat / Samudra, Ganesh et al. | 2007
- 199
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Pionics: the Emerging Science and Technology of Graphene-based Nanoelectronicsde Heer, Walt A. / Berger, Claire / Conrad, Ed / First, Phillip / Murali, Raghunath / Meindl, James et al. | 2007
- 203
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Fabrication and Characterization of Carbon Nanotube InterconnectsClose, Gael F. / Wong, H.-S. Philip et al. | 2007
- 207
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Carbon Nanotube Vias: A Reality CheckLi, Hong / Srivastava, Navin / Mao, Jun-Fa / Yin, Wen-Yan / Banerjee, Kaustav et al. | 2007
- 211
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Displays, Sensors, and MEMS - Flexible And Organic ElectronicsKlauk, Hagen / Someya, Takao et al. | 2007
- 213
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Matching Application-Specific Frontplanes With Generic BackplanesWagner, Sigurd et al. | 2007
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An Approach to Cost-Effective, Robust, Large-Area Electronics using Monolithic SiliconHuang, Kevin / Dinyari, Rostam / Lanzara, Giulia / Kim, Jong Yon / Feng, Jianmin / Vancura, Cyril / Chang, Fu-Kuo / Peumans, Peter et al. | 2007
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High-Performance and Low-Power Bulk Logic Platform Utilizing FET Specific Multiple-Stressors with Highly Enhanced Strain and Full-Porous Low-k Interconnects for 45-nm CMOS TechnologyMiyashita, T. / Ikeda, K. / Kim, Y. S. / Yamamoto, T. / Sambonsugi, Y. / Ochimizu, H. / Sakoda, T. / Okuno, M. / Minakata, H. / Ohta, H. et al. | 2007
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Record RF performance of 45-nm SOI CMOS TechnologyLee, Sungjae / Jagannathan, Basanth / Narasimha, Shreesh / Chou, Anthony / Zamdmer, Noah / Johnson, Jim / Williams, Richard / Wagner, Lawrence / Kim, Jonghae / Plouchart, Jean-Olivier et al. | 2007
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Technology Elements of a Common Platform Bulk Foundry Offering (Invited)Gilbert, P. / Steegen, A. / Coolbaugh, D. / Ramachandran, V. / Mocuta, A. / Hook, T. / Angyal, M. / Moy, D. et al. | 2007
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A 32nm CMOS Low Power SoC Platform Technology for Foundry Applications with Functional High Density SRAMWu, Shien-Yang / Chou, C.W. / Lin, C.Y. / Chiang, M.C. / Yang, C.K. / Liu, M.Y. / Hu, L.C. / Chang, C.H. / Wu, P.H. / Lin, C.I. et al. | 2007
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Fully-depleted SOI technology using high-k and single-metal gate for 32 nm node LSTP applications featuring 0.179 μm2 6T-SRAM bitcellFenouillet-Beranger, C. / Denorme, S. / Icard, B. / Boeuf, F. / Coignus, J. / Faynot, O. / Brevard, L. / Buj, C. / Soonekindt, C. / Todeschini, J. et al. | 2007
- 271
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Clarification of Additional Mobility Components associated with TaC and TiN Metal Gates in scaled HfSiON MOSFETs down to sub-1.0nm EOTTatsumura, Kosuke / Goto, Masakazu / Kawanaka, Shigeru / Nakajima, Kazuaki / Schimizu, Tatsuo / Ishihara, Takamitsu / Koyama, Masato et al. | 2007
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Impact of flash annealing on performance and reliability of high-κ/metal-gate MOSFETs for sub-45 nm CMOSKalra, Pankaj / Majhi, Prashant / Heh, Dawei / Bersuker, Gennadi / Young, Chadwin / Vora, Nikhil / Harris, Rusty / Kirsch, Paul / Choi, Rino / Chang, Man et al. | 2007
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Emerging Technologies - Energy Harvesting Electron DevicesWhite, Bruce et al. | 2007
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Developments in Silicon Solar CellsSwanson, Richard M. et al. | 2007
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Energy Harvesting - A Systems PerspectiveRabaey, J. / Burghardt, F. / Steingart, D. / Seeman, M. / Wright, P. et al. | 2007
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Energy Harvesting for Electronics with Thermoelectric Devices using Nanoscale MaterialsVenkatasubramanian, Rama / Watkins, Cynthia / Stokes, David / Posthill, John / Caylor, Chris et al. | 2007
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Nanogenerators and NanopiezotronicsWang, Zhong Lin et al. | 2007
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Micro-Engineered Devices for Motion Energy HarvestingYeatman, Eric M. / Mitcheson, Paul D. / Holmes, Andrew S. et al. | 2007
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Quantum, Power, and Compound Semiconductors - Reliability and Characterization Of Power HEMTsKizilyalli, Isik C. / Chen, Kevin J. et al. | 2007
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A review of failure modes and mechanisms of GaN-based HEMTsZanoni, Enrico / Meneghesso, Gaudenzio / Verzellesi, Giovanni / Danesin, Francesca / Meneghini, Matteo / Rampazzo, Fabiana / Tazzoli, Augusto / Zanon, Franco et al. | 2007
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Gate Current Degradation Mechanisms of GaN High Electron Mobility TransistorsJoh, Jungwoo / Xia, Ling / del Alamo, Jesus A. et al. | 2007
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Reliability of Enhancement-mode AlGaN/GaN HEMTs Fabricated by Fluorine Plasma TreatmentYi, Congwen / Wang, Ruonan / Huang, Wei / Tang, Wilson C.-W. / Lau, K. M. / Chen, Kevin J. et al. | 2007
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Drain Corrosion in RF Power GaAs PHEMTsVillanueva, A. / del Alamo, J.A. / Hisaka, T. / Ishida, T. et al. | 2007
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Remarkable Breakdown Voltage Enhancement in AlGaN Channel HEMTsNanjo, Takuma / Takeuchi, Misaichi / Suita, Muneyoshi / Abe, Yuji / Oishi, Toshiyuki / Tokuda, Yasunori / Aoyagi, Yoshinobu et al. | 2007
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Characterisation of AlGaN/GaN HEMT epitaxy and devices on composite substratesMeneghesso, G. / Ongaro, C. / Zanoni, E. / Brylinski, C. / di Forte-Poisson, M. A. / Hoel, V. / de Jaeger, J.C. / Langer, R. / Lahreche, H. / Bove, P. et al. | 2007
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High-voltage Millimeter-Wave GaN HEMTs with 13.7 W/mm Power DensityWu, Y.-F. / Moore, M. / Abrahamsen, A. / Jacob-Mitos, M. / Parikh, P. / Heikman, S. / Burk, A. et al. | 2007
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Displays, Sensors, and MEMS - RF MEMSWeber, Werner / Friedman, Thomas A. et al. | 2007
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Scalable 1.1 GHz fundamental mode piezo-resistive silicon MEMS resonatorvan Beek, J.T.M. / Verheijden, G.J.A.M. / Koops, G.E.J. / Phan, K.L. / van der Avoort, C. / van Wingerden, J. / Badaroglu, D. Ernur / Bontemps, J.J.M. et al. | 2007
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Internal Dielectric Transduction of a 4.5 GHz Silicon Bar ResonatorWeinstein, Dana / Bhave, Sunil A. et al. | 2007
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Single-Resonator Dual-Frequency Thin-Film Piezoelectric-on-Substrate OscillatorAbdolvand, Reza / Mirilavasani, Hossein / Ayazi, Farrokh et al. | 2007
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Integrated MEMS LC Resonator with Sealed Air-Suspended Structure for Single-Chip RF LSIsKuwabara, K. / Sato, N. / Morimura, H. / Kodate, J. / Nakamura, M. / Ugajin, M. / Kamei, T. / Kudou, K. / Machida, K. / Ishii, H. et al. | 2007
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Variable Capacitors and Tunable LC-Tanks Formed by CMOS-Compatible Metal MEMS for RF ICsGu, Lei / Li, Xinxin et al. | 2007
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MEMS Variable Capacitor Actuated with an Electrically Floating PlateYoon, Young Jun / Lee, Hyung Suk / Yoon, Jun-Bo et al. | 2007
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High Reproducibility and Reliability of Piezoelectric MEMS Tunable Capacitors for Reconfigurable RF Front-endKawakubo, T. / Nagano, T. / Nishigaki, M. / Itaya, K. et al. | 2007
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Maneuvering Pull-in Voltage of an Electrostatic Micro-switch by Introducing a Pre-charged ElectrodeYang, Hyun-Ho / Lee, Jeong Oen / Yoon, Jun-Bo et al. | 2007
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Integrated Circuits & Manufacturing - Nonvolatile MemoriesPrall, Kirk / Specth, Michael et al. | 2007
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A High-performance Multi-level NAND Flash Memory with 43nm-node Floating-gate TechnologyNoguchi, M. / Yaegashi, T. / Koyama, H. / Morikado, M. / Ishibashi, Y. / Ishibashi, S. / Ino, K. / Sawamura, K. / Aoi, T. / Maruyama, T. et al. | 2007
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Optimal Integration and Characteristics of Vertical Array Devices for Ultra-High Density, Bit-Cost Scalable Flash MemoryFukuzumi, Yoshiaki / Katsumata, Ryota / Kito, Masaru / Kido, Masaru / Sato, Mitsuru / Tanaka, Hiroyasu / Nagata, Yuzo / Matsuoka, Yasuyuki / Iwata, Yoshihisa / Aochi, Hideaki et al. | 2007
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Thorough investigation of Si-nanocrystal memories with high-k interpoly dielectrics for sub-45nm node Flash NAND applicationsMolas, G. / Bocquet, M. / Buckley, J. / Colonna, J. P. / Masarotto, L. / Grampeix, H. / Martin, F. / Vidal, V. / Toffoli, A. / Brianceau, P. et al. | 2007
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Novel Ultra-Low Voltage and High-Speed Programming/Erasing Schemes for SONOS Flash Memory with Excellent Data RetentionChung, Steve S. / Tseng, Y. H. / Lai, C. S. / Hsu, Y. Y. / Ho, Eric / Chen, Terry / Peng, L. C. / Chu, C. H. et al. | 2007
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Write Strategies for 2 and 4-bit Multi-Level Phase-Change MemoryNirschl, T. / Philipp, J. B. / Happ, T. D. / Burr, G. W. / Rajendran, B. / Lee, M.-H. / Schrott, A. / Yang, M. / Breitwisch, M. / Chen, C.-F. et al. | 2007
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CMOS Devices - Device/Design InteractionHorstmann, Manfred / Mahnkopf, Reinhard et al. | 2007
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Understanding Random Threshold Voltage Fluctuation by Comparing Multiple Fabs and TechnologiesTakeuchi, K. / Fukai, T. / Tsunomura, T. / Putra, A. T. / Nishida, A. / Kamohara, S. / Hiramoto, T. et al. | 2007
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Reducing Variation in Advanced Logic Technologies: Approaches to Process and Design for Manufacturability of Nanoscale CMOSKuhn, Kelin J. et al. | 2007
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Controllable Inverter Delay and Suppressing Vth Fluctuation Technology in Silicon on Thin BOX Featuring Dual Back-Gate Bias ArchitectureTsuchiya, Ryuta / Ishigaki, Takashi / Morita, Yusuke / Yamaoka, Masanao / Iwamatsu, Toshiaki / Ipposhi, Takashi / Oda, Hidekazu / Sugii, Nobuyuki / Kimura, Shin'ichiro / Itoh, Kiyoo et al. | 2007
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Measurements of Inter-and-Intra Device Transient Thermal Transport on SOI FETsSolomon, P. M. / Shamsa, M. / Jenkins, K. A. / D'Emic, C. P. / Balandin, A. A. / Haensch, W. et al. | 2007
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An Effective Switching Current Methodology to Predict the Performance of Complex Digital Circuitsvon Arnim, Klaus / Pacha, Christian / Hofmann, Karl / Schulz, Thomas / Schrufer, Klaus / Berthold, Jorg et al. | 2007
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Direct evaluation of DC characteristic variability in FinFET SRAM Cell for 32 nm node and beyondInaba, Satoshi / Kawasaki, Hirohisa / Okano, Kimitoshi / Izumida, Takashi / Yagishita, Atsushi / Kaneko, Akio / Ishimaru, Kazunari / Aoki, Nobutoshi / Toyoshima, Yoshiaki et al. | 2007
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CMOS & Interconnect Reliability - Advanced Dielectric ReliabilityPey, Kin Leong / Furusawa, Takeshi et al. | 2007
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On the progressive breakdown statistical distribution and its voltage accelerationWu, Ernest / Tous, Santi / Sune, Jordi et al. | 2007
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Multiple Digital Breakdowns and Its Consequence on Ultrathin Gate Dielectrics Reliability PredictionLo, V. L. / Pey, K. L. / Tung, C. H. / Li, X. et al. | 2007
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TDDB Reliability Prediction Based on the Statistical Analysis of Hard Breakdown Including Multiple Soft Breakdown and Wear-outSahhaf, S. / Degraeve, R. / Roussel, Ph. J. / Kauerauf, T. / Kaczer, B. / Groeseneken, G. et al. | 2007
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Multi-probe Two-Dimensional Mapping of Off-State Degradation in DeNMOS Transistors: How and Why Interface Damage Predicts Gate Dielectric BreakdownVarghese, D. / Kufluoglu, H. / Reddy, V. / Shichijo, H. / Mosher, D. / Krishnan, S. / Alam, M. A. et al. | 2007
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Designing Reliable Systems with Unreliable Devices Challenges and OpportunitiesBenini, Luca et al. | 2007
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Copper Wiring Encapsulation with Ultra-thin Barriers to Enhance Wiring and Dielectric Reliabilities for 32-nm Nodes and BeyondKudo, H. / Haneda, M / Ochimizu, H. / Tsukune, A. / Okano, S. / Ohtsuka, N. / Sunayama, M. / Sakai, H. / Suzuki, T. / Kitada, H. et al. | 2007
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Process Technology - Gate Stack Process II - Metal Gate / High K IntegrationEguchi, Kazuhiro / Colombo, Luigi et al. | 2007
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Feasible Integration Scheme for Dual Work Function FUSI/HfSiON Gate Stacks with Selective Metal Pile-up to nMOSFETTsuchiya, Yoshinori / Yoshiki, Masahiko / Kaneko, Akio / Inumiya, Seiji / Saito, Tomohiro / Nakajima, Kazuaki / Aoyama, Tomonori / Koga, Junji / Nishiyama, Akira / Koyama, Masato et al. | 2007
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Gate-First Processed FUSI/HfO2/HfSiOx/Si MOSFETs with EOT=0.5 nm - Interfacial Layer Formation by Cycle-by-Cycle Deposition and AnnealingTakahashi, M. / Ogawa, A. / Hirano, A. / Kamimuta, Y. / Watanabe, Y. / Iwamoto, K. / Migita, S. / Yasuda, N. / Ota, H. / Nabatame, T. et al. | 2007
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Single Metal/Dual High-k Gate Stack with Low Vth and Precise Gate Profile Control for Highly Manufacturable Aggressively Scaled CMISFETsMise, N. / Morooka, T. / Eimori, T. / Kamiyama, S. / Murayama, K. / Sato, M. / Ono, T. / Nara, Y. / Ohji, Y. et al. | 2007
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Practical dual-metal-gate dual-high-k CMOS integration technology for hp 32 nm LSTP utilizing process-friendly TiAlN metal gateKadoshima, M. / Matsuki, T. / Sato, M. / Aminaka, T. / Kurosawa, E. / Ohta, A. / Yoshinaga, H. / Miyazaki, S. / Shiraishi, K. / Yamabe, K. et al. | 2007
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A Dy2O3-capped HfO2 Dielectric and TaCx-based Metals Enabling Low-Vt Single-Metal-Single-Dielectric Gate StackChang, V. S. / Ragnarsson, L.-A. / Pourtois, G. / O'Connor, R. / Adelmann, C. / Van Elshocht, S. / Delabie, A. / Swerts, J. / Van der Heyden, N. / Conard, T. et al. | 2007
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Band Edge Gate First HfSiON/Metal Gate n-MOSFETs using ALD-La2O3 Cap Layers Scalable to EOT=0.68 nm for hp 32 nm Bulk Devices with High Performance and ReliabilityKamiyama, Satoshi / Miura, Takayoshi / Kurosawa, Etsuo / Kitajima, Masashi / Ootuka, Minoru / Aoyama, Takayuki / Nara, Yasuo et al. | 2007
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Aggressively Scaled High-k Gate Dielectric with Excellent Performance and High Temperature Stability for 32nm and BeyondSivasubramani, P. / Kirsch, P. D. / Huang, J. / Park, C. / Tan, Y. N. / Gilmer, D. C. / Young, C. / Freeman, K. / Hussain, M. M. / Harris, R. et al. | 2007
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Modeling & Simulation - Development And Applications Of Compact Models For Advanced Circuit DesignKlaassen, Dirk / Jallepalli, Srinivas et al. | 2007
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A Unified Compact Model of the Gate Oxide Reliability for Complete Circuit Level AnalysisLee, Chi-Hwan / Yang, Gi-Young / Park, Jin-Kyu / Park, Young-Kwan / Kim, Hyung-Wook / Park, Donggun / Yoo, Moon-Hyun et al. | 2007
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A predictive analytical model of 3D MIM capacitors for RC ICSegura, Noel / Cremer, Sebastien / Gloria, Daniel / Ciampolini, Lorenzo / Picollet, Eric / Minondo, Michel et al. | 2007
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Physically-based unified compact model for low-field carrier mobility in MOSFETs with different gate stacks and biaxial/uniaxial stress conditionsReggiani, Susanna / Silvestri, Luca / Cacciatori, Alessio / Gnani, Elena / Gnudi, Antonio / Baccarani, Giorgio et al. | 2007
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A new model for 1/f noise in high-κ MOSFETsMorshed, Tanvir / Devireddy, Siva Prasad / Rahman, M. Shahriar / Celik-Butler, Zeynep / Tseng, Hsing-Huang / Zlotnicka, Ania / Shanware, Ajit / Green, Keith / Chambers, J. J. / Visokay, M. R. et al. | 2007
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A Multi-Gate MOSFET Compact Model Featuring Independent-Gate OperationLu, Darsen D. / Dunga, Mohan V. / Lin, Chung-Hsun / Niknejad, Ali M. / Hu, Chenming et al. | 2007
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High Performance CMOS Variability in the 65nm Regime and BeyondNassif, Sani / Bernstein, Kerry / Frank, David J. / Gattiker, Anne / Haensch, Wilfried / Ji, Brian L. / Nowak, Ed / Pearson, Dale / Rohrer, Norman J. et al. | 2007
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Rapid Circuit-based Optimization of Low Operational Power CMOS DevicesChristie, P. / Nackaerts, A. / Hoffmann, T. / Kumar, A. et al. | 2007
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Displays, Sensors, and MEMS - TFTs, Displays and MemoriesHatano, Mutsuko / Milne, William et al. | 2007
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ZnO Thin Film Transistor Ring Oscillators with sub 75 nsec Propagation DelaySun, Jie / Mourey, Devin A. / Zhao, Dalong / Park, Sung Kyu / Nelson, Shelby F. / Levy, David H. / Freeman, Diane / Cowdery-Corvan, Peter / Lee. Tutt, / Jackson, Thomas N. et al. | 2007
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New Approach for Passivation of Ga2O3-In2O3-ZnO Thin Film TransistorsKim, Sun Il / Kim, Chang Jung / Park, Jae Chul / Song, Ihun / Kang, Dong Hun / Lim, Hyuck / Kim, Sang Wook / Lee, Eunha / Lee, Jae Chul / Park, Youngsoo et al. | 2007
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High performance transparent thin film transistors based on indium gallium zinc oxide as the channel materialSuresh, Arun / Wellenius, Patrick / Muth, John F. et al. | 2007
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Sub-Micron CMOS / MOS-Bipolar Hybrid TFTs for System DisplaysKawachi, G. / Okada, T. / Tsuboi, S. / Mitani, M. et al. | 2007
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New In-Situ Process of Top Gate Nanocrystalline Silicon Thin Film Transistors Fabricated at 180 °C for the Suppression of Leakage CurrentPark, Joong-Hyun / Han, Sang-Myeon / Choi, Young-Hwan / Kim, Sun-Jae / Han, Min-Koo et al. | 2007
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Uniform High Current Field Emission of Electrons from Si and CNF FEAs Individually Controlled by Si Pillar Ungated FETsVelasquez-Garcia, L. F. / Adeoti, B. / Niu, Y. / Akinwande, A. I. et al. | 2007
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Compact Nano-Electro-Mechanical Non-Volatile Memory (NEMory) for 3D IntegrationChoi, Woo Young / Kam, Hei / Lee, Donovan / Lai, Joanna / Liu, Tsu-Jae King et al. | 2007
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Quantum, Power, and Compound Semiconductors - III-V FETs for Microwave, Millimiter Wave and Digital ApplicationsMicovic, Miroslav / Fay, Patrick et al. | 2007
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Sub 50 nm InP HEMT Device with Fmax Greater than 1 THzLai, R. / Mei, X. B. / Deal, W. R. / Yoshida, W. / Kim, Y. M. / Liu, P. H. / Lee, J. / Uyeda, J. / Radisic, V. / Lange, M. et al. | 2007
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610 GHz InAlAs/In0.75GaAs Metamorphic HEMTs with an Ultra-Short 15-nm-GateYeon, Seong-Jin / Park, Myonghwan / Choi, JeHyuk / Seo, Kwangseok et al. | 2007
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0.1 μm In02Al08Sb-InAs HEMT low-noise amplifiers for ultralow-power applicationsChou, Y. C. / Lange, M. D. / Bennett, B. R. / Boos, J. B. / Yang, J. M. / Papanicolaou, N. A. / Lin, C. H. / Lee, L. J. / Nam, P. S. / Gutierrez, A. L. et al. | 2007
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High Mobility III-V MOSFETs For RF and Digital ApplicationsPasslack, M. / Zurcher, P. / Rajagopalan, K. / Droopad, R. / Abrokwah, J. / Tutt, M. / Park, Y.-B. / Johnson, E. / Hartin, O. / Zlotnicka, A. et al. | 2007
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Heterogeneous integration of enhancement mode in0.7ga0.3as quantum well transistor on silicon substrate using thin (les 2 μm) composite buffer architecture for high-speed and low-voltage ( 0.5 v) logic applicationsHudait, M. K. / Dewey, G. / Datta, S. / Fastenau, J. M. / Kavalieros, J. / Liu, W. K. / Lubyshev, D. / Pillarisetty, R. / Rachmady, W. / Radosavljevic, M. et al. | 2007
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Logic Performance of 40 nm InAs HEMTsKim, Dae-Hyun / del Alamo, Jesus A. et al. | 2007
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90 nm Self-aligned Enhancement-mode InGaAs HEMT for Logic ApplicationsWaldron, Niamh / Kim, Dae-Hyun / del Alamo, Jesus A. et al. | 2007
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High performance submicron inversion-type enhancement-mode InGaAs MOSFETs with ALD Al2O3, HfO2 and HfAlO as gate dielectricsXuan, Y. / Wu, Y. Q. / Shen, T. / Yang, T. / Ye, P. D. et al. | 2007
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Device/Circuit Interactions in Highly-Scaled CMOS: Challenges and Potential SolutionsBrederlow, Ralf et al. | 2007
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Technology Circuit Co-Design for High Performance LogicBernstein, Kerry / Rohrer, Norman J. et al. | 2007
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Variability Mitigation in Highly Scaled CMOS: Challenges for EDAKahng, Andrew B. et al. | 2007
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Leakage Reduction in Sub-100nm CMOS Technologies: Bridging the Gap Between Technology, Circuit Design and Low Power Product RequirementsPacha, Christian / Berthold, Jorg et al. | 2007
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An Adaptive Design of SRAM Memory CellIshibashi, Koichiro et al. | 2007
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Looking Beyond Silicon - A Pipe Dream or the Inevitable Next Step?Antoniadis, Dimitri et al. | 2007
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Quantum, Power, & Compound Semiconductors - Ultra High Speed SiGe and InP-based HBTsGhione, Giovanni / Ida, Minoru et al. | 2007
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SiGe BiCMOS Technology with 3.0 ps Gate DelayRucker, H. / Heinemann, B. / Barth, R. / Bauer, J. / Blum, K. / Bolze, D. / Drews, J. / Fischer, G. G. / Fox, A. / Fursenko, O. et al. | 2007
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A Novel Fully Self-Aligned SiGe:C HBT Architecture Featuring a Single-Step Epitaxial Collector-Base ProcessDonkers, J.J.T.M. / Kramer, M.C.J.C.M. / Van Huylenbroeck, S. / Choi, L.J. / Meunier-Beillard, P. / Sibaja-Hernandez, A. / Boccardi, G. / van Noort, W. / Hurkx, G.A.M. / Vanhoucke, T. et al. | 2007
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Electrically pumped Ge Laser at room temperatureCheng, T. -H. / Kuo, P. -S. / Lee, C. T. / Liao, M. H. / Hung, T. A. / Liu, C. W. et al. | 2007
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Type-II GaAsSb/InP DHBTs with Record fT = 670 GHz and Simultaneous fT, fMAX ≫ 400 GHzSnodgrass, William / Wu, Bing-Ruey / Cheng, K. Y. / Feng, Milton et al. | 2007
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600 GHz InP/GaAsSb/InP DHBTs Grown by MOCVD with a Ga(As,Sb) Graded-Base and fT x BVCEO ≫ 2.5 THz-V at Room TemperatureLiu, H.G. / Ostinelli, O. / Zeng, Y. / Bolognesi, C.R. et al. | 2007
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High-Speed InP HBT Technology for Advanced Mixed-signal and Digital ApplicationsMonier, C. / Scott, D. / D'Amore, M. / Chan, B. / Dang, L. / Cavus, A. / Kaneshiro, E. / Nam, P. / Sato, K. / Cohen, N. et al. | 2007
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Process Technology - Advanced Process & Integration TechnologyDe Salvo, Barbara / Lee, Tze-Liang et al. | 2007
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Embedded Flash on 90nm Logic Technology & Beyond for FPGAsKojima, H. / Ema, T. / Anezaki, T. / Ariyoshi, J. / Ogawa, H. / Yoshizawa, K. / Mehta, S. / Fong, S. / Logie, S. / Smoak, R. et al. | 2007
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Gatestacks for scalable high-performance FinFETsVellianitis, G. / van Dal, M.J.H. / Witters, L. / Curatola, G. / Doornbos, G. / Collaert, N. / Jonville, C. / Torregiani, C. / Lai, L.-S. / Petry, J. et al. | 2007
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Route to Low Parasitic Resistance in MuGFETs with Silicon-Carbon Source/Drain: Integration of Novel Low Barrier Ni(M)Si:C Metal Silicides and Pulsed Laser AnnealingLee, Rinus Tek-Po / Koh, Alvin Tian-Yi / Liu, Fang-Yue / Fang, Wei-Wei / Liow, Tsung-Yang / Tan, Kian-Ming / Lim, Poh-Chong / Lim, Andy Eu-Jin / Zhu, Ming / Hoe, Keat-Mun et al. | 2007
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Si/SiGe Epitaxy: a Ubiquitous Process for Advanced ElectronicsDutartre, D. / Loubet, N. / Brossard, F. / Vandelle, B. / Chevalier, P. / Chantre, A. / Monfray, S. / Fenouillet-Beranger, C. / Pouydebasque, A. / Skotnicki, T. et al. | 2007
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Localized SOI technology: an innovative Low Cost self-aligned process for Ultra Thin Si-film on thin BOX integration for Low Power applicationsMonfray, S. / Samson, MP. / Dutartre, D. / Ernst, T. / Rouchouze, E. / Renaud, D. / Guillaumot, B. / Chanemougame, D. / Rabille, G. / Borel, S. et al. | 2007
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Proof of Ge-interfacing Concepts for Metal/High-k/Ge CMOS - Ge-intimate Material Selection and Interface Conscious Process FlowTakahashi, T. / Nishimura, T. / Chen, L. / Sakata, S. / Kita, K. / Toriumi, A. et al. | 2007
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CMOS Devices - Physics and Technologies of Mobility EnhancementTakagi, Shinichi / Clerc, Raphael et al. | 2007
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Extension of Universal Mobility Curve to Multi-Gate MOSFETsYoshimoto, Hiroyuki / Sugii, Nobuyuki / Hisamoto, Digh / Saito, Shin-ichi / Tsuchiya, Ryuta / Kimura, Shin'ichiro et al. | 2007
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More-than-Universal Mobility in Double-Gate SOI p-FETs with Sub-10-nm Body Thickness -Role of Light-Hole Band and Compatibility with Uniaxial Stress EngineeringKobayashi, Shigeki / Saitoh, Masumi / Uchida, Ken et al. | 2007
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Physical Understanding of Fundamental Properties of Si (110) pMOSFETs Inversion-Layer Capacitance, Mobility Universality, and Uniaxial Stress EffectsSaitoh, Masumi / Kobayashi, Shigeki / Uchida, Ken et al. | 2007
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Mobility Enhancement in Uniaxially Strained (110) Oriented Ultra-Thin Body Single- and Double-Gate MOSFETs with SOI Thickness of Less Than 4 nmShimizu, Ken / Hiramoto, Toshiro et al. | 2007
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Examination of Additive Mobility Enhancements for Uniaxial Stress Combined with Biaxially Strained Si, Biaxially Strained SiGe and Ge Channel MOSFETsWeber, O. / Irisawa, T. / Numata, T. / Harada, M. / Taoka, N. / Yamashita, Y. / Yamamoto, T. / Sugiyama, N. / Takenaka, M. / Takagi, S. et al. | 2007
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Interface-Engineered Ge (100) and (111), N- and P-FETs with High MobilityKuzum, Duygu / Pethe, Abhijit J. / Krishnamohan, Tejas / Oshima, Yasuhiro / Sun, Yun / McVittie, Jim P. / Pianetta, Piero A. / McIntyre, Paul C. / Saraswat, Krishna C. et al. | 2007
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High Performance pMOSFETs Using Si/Si1-xGex/Si Quantum Wells with High-k/Metal Gate Stacks and Additive Uniaxial Strain for 22 nm Technology NodeSuthram, S. / Majhi, P. / Sun, G. / Kalra, P. / Harris, H. R. / Choi, K. J. / Heh, D. / Oh, J. / Kelly, D. / Choi, R. et al. | 2007
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Modeling & Simulation - Nanotubes, Nanowires, and NanoribbonsIannaccone, Giuseppe / Sano, Nobuyuki et al. | 2007
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Three-dimensional Modeling of Gate Leakage in Si Nanowire TransistorsLuisier, Mathieu / Schenk, Andreas / Fichtner, Wolfgang et al. | 2007
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Band Structure Effects on the Current-Voltage Characteristics of SNW-FETsGnani, Elena / Gnudi, Antonio / Reggiani, Susanna / Rudan, Massimo / Baccarani, Giorgio et al. | 2007
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1-D and 2-D Devices Performance Comparison Including Parasitic Gate Capacitance and Screening EffectWei, Lan / Deng, Jie / Wong, H.-S. Philip et al. | 2007
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Exciton generation in suspended carbon nanotube FETs: a computational studyKoswatta, Siyuranga O. / Perebeinos, Vasili / Lundstrom, Mark S. / Avouris, Phaedon et al. | 2007
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A Comprehensive Atomic Study of Carbon Nanotube Schottky Diode Using First Principles ApproachBai, Ping / Lam, Kai Tak / Li, Erping / Chang, Ken Kai-fu et al. | 2007
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Analytical Model of Carbon Nanotube Electrostatics: Density of States, Effective Mass, Carrier Density, and Quantum CapacitanceAkinwande, Deji / Nishi, Yoshio / Wong, H.-S. Philip et al. | 2007
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Performance Comparison of Graphene Nanoribbon Schottky Barrier and MOS FETsFiori, Gianluca / Yoon, Youngki / Hong, Seokmin / Iannaccone, Giuseppe / Guo, Jing et al. | 2007
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Simulation Investigation of Double-Gate CNR-MOSFETs with a Fully Self-Consistent NEGF and TB MethodGuan, Ximeng / Zhang, Ming / Liu, Qiang / Yu, Zhiping et al. | 2007
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-
Solid-State and Nanoelectronic Devices - Emerging Resistive RAM and New Function On SiliconSeo, Sunae / Gautier, Jacques et al. | 2007
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Low Power and High Speed Switching of Ti-doped NiO ReRAM under the Unipolar Voltage Source of less than 3 VTsunoda, K. / Kinoshita, K. / Noshiro, H. / Yamazaki, Y. / Iizuka, T. / Ito, Y. / Takahashi, A. / Okano, A. / Sato, Y. / Fukano, T. et al. | 2007
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2-stack 1D-1R Cross-point Structure with Oxide Diodes as Switch Elements for High Density Resistance RAM ApplicationsLee, Myoung-Jae / Park, Youngsoo / Kang, Bo-Soo / Ahn, Seung-Eon / Lee, Changbum / Kim, Kihwan / Xianyu, Wenxu. / Stefanovich, G. / Lee, Jung-Hyun / Chung, Seok-Jae et al. | 2007
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Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAMRusso, U. / Ielmini, D. / Cagli, C. / Lacaita, A. L. / Spiga, S. / Wiemer, C. / Perego, M. / Fanciulli, M. et al. | 2007
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Fast switching and long retention Fe-O ReRAM and its switching mechanismMuraoka, S. / Osano, K. / Kanzawa, Y. / Mitani, S. / Fujii, S. / Katayama, K. / Katoh, Y. / Wei, Z. / Mikawa, T. / Arita, K. et al. | 2007
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A Novel Resistance Memory with High Scalability and Nanosecond SwitchingAratani, K. / Ohba, K. / Mizuguchi, T. / Yasuda, S. / Shiimoto, T. / Tsushima, T. / Sone, T. / Endo, K. / Kouchiyama, A. / Sasaki, S. et al. | 2007
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A Silicon Photonics Approach for the Nanotechnology EraOhashi, K. / Nishi, K. / Shimizu, T. / Nakada, M. / Fujikata, J. / Ushida, J. / Gomyo, A. / Ishi, T. / Nose, K. / Mizuno, M. et al. | 2007
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Single-electron circuit for stochastic data processing using nano-MOSFETsNishiguchi, Katsuhiko / Fujiwara, Akira et al. | 2007
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CMOS and Interconnect Reliability - Negative Bias Temperature InstabilityBersuker, Gennadi / Suehle, John et al. | 2007
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New characterization and modeling approach for NBTI degradation from transistor to product levelHuard, V. / Parthasarathy, C. / Rallet, N. / Guerin, C. / Mammase, M. / Barge, D. / Ouvrard, C. et al. | 2007
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Simultaneous Extraction of Recoverable and Permanent Components Contributing to Bias-Temperature InstabilityGrasser, T. / Kaczer, B. / Hehenberger, P. / Gos, W. / O'Connor, R. / Reisinger, H. / Gustin, W. / Schlunder, C. et al. | 2007
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Theory and Practice of On-the-fly and Ultra-fast VT Measurements for NBTI Degradation: Challenges and OpportunitiesIslam, A.E. / Kumar, E. N. / Das, H. / Purawat, S. / Maheta, V. / Aono, H. / Murakami, E. / Mahapatra, S. / Alam, M.A. et al. | 2007
- 809
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Material Dependence of NBTI Physical Mechanism in Silicon Oxynitride (SiON) p-MOSFETs: A Comprehensive Study by Ultra-Fast On-The-Fly (UF-OTF) IDLIN TechniqueKumar, E. N. / Maheta, V. D. / Purawat, S. / Islam, A. E. / Olsen, C. / Ahmed, K. / Alam, M. A. / Mahapatra, S. et al. | 2007
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On-The-Fly Interface Trap Measurement and Its Impact on the Understanding of NBTI Mechanism for p-MOSFETs with SiON Gate DielectricLiu, W.J. / Liu, Z.Y. / Huang, Daming / Liao, C.C. / Zhang, L.F. / Gan, Z.H. / Wong, Waisum / Shen, C. / Li, Ming-Fu et al. | 2007
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Real Vth instability of pMOSFETs under practical operation conditionsZhang, J. F. / Ji, Z. / Chang, M. H. / Kaczer, B. / Groeseneken, G. et al. | 2007
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New Observations on the Hot Carrier and NBTI Reliability of Silicon Nanowire TransistorsWang, Runsheng / Huang, Ru / Kim, Dong-Won / He, Yandong / Wang, Zhenhua / Jia, Gaosheng / Park, Donggun / Wang, Yangyuan et al. | 2007
- 825
-
Impact of TiN Metal gate on NBTI assessed by interface states and fast transient effect characterizationRafik, M. / Garros, X. / Ribes, G. / Ghibaudo, G. / Hobbs, C. / Zauner, A. / Muller, M. / Huard, V. / Ouvrard, C. et al. | 2007
- 829
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Displays, Sensors, and MEMS - Chemical and Biological Sensors, and MicrosystemsGardner, Julian / van Beek, Joost et al. | 2007
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Three technologies for a smart miniaturized gas-sensor: SOI CMOS, micromachining, and CNTs - challenges and performanceUdrea, F. / Maeng, S. / Gardner, J.W. / Park, J. / Haque, M.S. / Ali, S.Z. / Choi, Y. / Guha, P.K. / Vieira, S.M.C. / Kim, H.Y. et al. | 2007
- 835
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AlGaN/GaN Heterostructure Field Effect Transistors for High Temperature Hydrogen Sensing with Enhanced SensitivitySong, Junghui / Lu, Wu et al. | 2007
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-
Improved Liquid Phase Chromatography Separation using Sub-micron Micromachining TechnologyTezcan, Deniz Sabuncuoglu / Verbist, Agnes / De Malsche, Wim / Vangelooven, Joris / Eghbali, Hamed / Clicq, David / Desmet, Gert / De Moor, Piet et al. | 2007
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A Micro Ionizer for Portable Mass Spectrometers using Double-gated Isolated Vertically Aligned Carbon Nanofiber ArraysChen, L.-Y. / Velasquez-Garcia, L. F. / Wang, X. / Teo, K. / Akinwande, A. I. et al. | 2007
- 847
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Optoelectronic Tweezers for Manipulation of Cells and NanowiresWu, Ming C. et al. | 2007
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Integrated ZnO Surface Acoustic Wave Microfluidic and Biosensor SystemLee, D. S. / Fu, Y. Q. / Maeng, S. / Du, X. Y. / Tan, S. C. / Luo, J. K. / Flewitt, A. J. / Kim, S. H. / Park, N. M. / Choi, Y. J. et al. | 2007
- 855
-
Electrical measurement of adhesion and viability of living cells with a silicon chipBandiera, L. / Borgo, M. / Cellere, G. / De Toni, A. / Santoni, L. / Maschio, M. Dal / Girardi, S. / Lorenzelli, L. / Paccagnella, A. et al. | 2007
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-
Quantum, Power, and Compound Semiconductors - High Voltage Power Devicesvan Rijs, Fred / Khemka, Vishnu et al. | 2007
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-
8300V Blocking Voltage AlGaN/GaN Power HFET with Thick Poly-AlN PassivationUemoto, Yasuhiro / Shibata, Daisuke / Yanagihara, Manabu / Ishida, Hidetoshi / Matsuo, Hisayoshi / Nagai, Shuichi / Batta, Nagaraj / Li, Ming / Ueda, Tetsuzo / Tanaka, Tsuyoshi et al. | 2007
- 865
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650 V 3.1 mΩcm2 GaN-based monolithic bidirectional switch using normally-off gate injection transistorMorita, Tatsuo / Yanagihara, Manabu / Ishida, Hidetoshi / Hikita, Masahiro / Kaibara, Kazuhiro / Matsuo, Hisayoshi / Uemoto, Yasuhiro / Ueda, Tetsuzo / Tanaka, Tsuyoshi / Ueda, Daisuke et al. | 2007
- 869
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Current Collapseless High-Voltage GaN-HEMT and its 50-W Boost Converter OperationSaito, Wataru / Kuraguchi, Masahiko / Takada, Yoshiharu / Tsuda, Kunio / Saito, Yasunobu / Omura, Ichiro / Yamaguchi, Masakazu et al. | 2007
- 873
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High-performance p-channel diamond MOSFETs with alumina gate insulatorHirama, Kazuyuki / Takayanagi, Hidenori / Yamauchi, Shintaro / Jingu, Yoshikatsu / Umezawa, Hitoshi / Kawarada, Hiroshi et al. | 2007
- 877
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Stress-Induced Mobility Enhancement for Integrated Power TransistorsMoens, P. / Roig, J. / Clemente, F. / De Wolf, I. / Desoete, B. / Bauwens, F. / Tack, M. et al. | 2007
- 881
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Impact of Self-Heating Effect on Hot Carrier Degradation in High-Voltage LDMOSCheng, Chih-Chang / Lin, J.F. / Wang, Tahui / Hsieh, T.H. / Tzeng, J.T. / Jong, Y.C. / Liou, R.S. / Pan, Samuel C. / Hsu, S.L. et al. | 2007
- 885
-
CMOS Devices - Advanced Device StructuresChang, Chih-Sheng / Hokazono, Akira et al. | 2007
- 887
-
Observation of Mobility Enhancement in Strained Si and SiGe Tri-Gate MOSFETs with Multi-Nanowire Channels Trimmed by Hydrogen Thermal EtchingTezuka, T. / Toyoda, E. / Nakaharai, S. / Irisawa, T. / Hirashita, N. / Moriyama, Y. / Sugiyama, N. / Taoka, N. / Yamashita, Y. / Kiso, O. et al. | 2007
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-
Investigation of nanowire size dependency on TSNWFETSuk, Sung Dae / Li, Ming / Yeoh, Yun Young / Yeo, Kyoung Hwan / Cho, Keun Hwi / Ku, In Kyung / Cho, Hong / Jang, WonJun / Kim, Dong-Won / Park, Donggun et al. | 2007
- 895
-
New Self-Aligned Silicon Nanowire Transistors on Bulk Substrate Fabricated by Epi-Free Compatible CMOS Technology: Process Integration, Experimental Characterization of Carrier Transport and Low Frequency noiseTian, Yu / Huang, Ru / Wang, Yiqun / Zhuge, Jing / Wang, Runsheng / Liu, Jia / Zhang, Xing / Wang, Yangyuan et al. | 2007
- 899
-
Experimental Investigation on Superior PMOS Performance of Uniaxial Strained ≪110≫ Silicon Nanowire Channel By Embedded SiGe Source/DrainLi, Ming / Yeo, Kyoung Hwan / Yeoh, Yun Young / Suk, Sung Dae / Cho, Keun Hwi / Kim, Dong-Won / Park, Donggun / Lee, Won-Seong et al. | 2007
- 903
-
A Novel Body Effect Reduction Technique to Recessed Channel Transistor Featuring Partially Insulating Layer Under Source and Drain : Application to Sub-50nm DRAM CellPark, Jong-Man / Sohn, Si-Ok / Park, Jung-Soo / Han, Sang-Yeon / Lee, Jun-Bum / Kim, Wookje / Jeon, Chang-Hoon / Kim, Shin-Deuk / Kim, Young-Pil / Lee, Yong-Seok et al. | 2007
- 907
-
Ultra-Low Leakage Silicon-on-Insulator Technology for 65 nm Node and BeyondCai, Jin / Majumdar, Amlan / Dobuzinsky, David / Ning, Tak H. / Koester, Steven J. / Haensch, Wilfried E. et al. | 2007
- 911
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Solid-State and Nanoelectronic Devices - Nanoscale Flash and DRAM TechnologiesKrishnamohan, Tejas / Fung, Samuel et al. | 2007
- 913
-
A High-Speed BE-SONOS NAND Flash Utilizing the Field-Enhancement Effect of FinFETHsu, Tzu-Hsuan / Lue, Hang-Ting / Lai, Erh-Kun / Hsieh, Jung-Yu / Wang, Szu-Yu / Yang, Ling-Wu / King, Ya-Chin / Yang, Tahone / Chen, Kuang-Chao / Hsieh, Kuang-Yeu et al. | 2007
- 917
-
Highly Scalable Vertical Double Gate NOR Flash MemoryCho, Hoon / Kapur, Pwan / Kalavade, Pranav / Saraswat, Krishna C. et al. | 2007
- 921
-
Advantages of the FinFET architecture in SONOS and Nanocrystal memory devicesLombardo, S. / Gerardi, C. / Breuil, L. / Jahan, C. / Perniola, L. / Cina, G. / Corso, D. / Tripiciano, E. / Ancarani, V. / Iannaccone, G. et al. | 2007
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-
New Generation of Z-RAMOkhonin, S. / Nagoga, M. / Carman, E. / Beffa, R. / Faraoni, E. et al. | 2007
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-
A Unified-RAM (URAM) Cell for Multi-Functioning Capacitorless DRAM and NVMHan, Jin-Woo / Ryu, Seong-Wan / Kim, Chungjin / Kim, Sungho / Im, Maesoon / Choi, Sung Jin / Kim, Jin Soo / Kim, Kwang Hee / Lee, Gi Sung / Oh, Jae Sub et al. | 2007
- 933
-
Extremely Low-voltage and High-speed Operation Bulk Thyristor-SRAM/DRAM (BT-RAM) Cell with Triple Selective Epitaxy Layers (TEL)Sugizaki, T. / Nakamura, M. / Yanagita, M. / Shinohara, M. / Ikuta, T. / Ohchi, T. / Kugimiya, K. / Kanda, S. / Yagami, K. / Oda, T. et al. | 2007
- 937
-
Modeling and Simulation - Simulation of Processes and Advanced MemoriesHane, Masami / Ghetti, Andrea et al. | 2007
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Physical interpretation, modeling and impact on phase change memory (PCM) reliability of resistance drift due to chalcogenide structural relaxationIelmini, D. / Lavizzari, S. / Sharma, D. / Lacaita, A. L. et al. | 2007
- 943
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Physical Model for NAND operation in SOI and Body-Tied Nanocrystal FinFLASH memoriesPerniola, L. / Nowak, E. / Iannaccone, G. / Scheiblin, P. / Jahan, C. / Pananakakis, G. / Razafindramora, J. / De Salvo, B. / Deleonibus, S. / Reimbold, G. et al. | 2007
- 947
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Development of A 3D Simulator for Metal Nanocrystal (NC) Flash Memories under NAND OperationNainani, A. / Palit, S. / Singh, P. K. / Ganguly, U. / Krishna, N. / Vasi, J. / Mahapatra, S. et al. | 2007
- 951
-
Current Capabilities and Future Prospects of Atomistic Process SimulationJaraiz, M. / Castrillo, P. / Pinacho, R. / Rubio, J. E. et al. | 2007
- 955
-
Analysis of As, P Diffusion and Defect Evolution during Sub-millisecond Non-melt Laser Annealing based on an Atomistic Kinetic Monte Carlo ApproachNoda, T. / Vandervorst, W. / Felch, S. / Parihar, V. / Cuperus, A. / Mcintosh, R. / Vrancken, C. / Rosseel, E. / Bender, H. / Van Daele, B. et al. | 2007
- 959
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Experimental and Theoretical Analysis of Dopant Diffusion and C Evolution in High-C Si:C Epi Layers: Optimization of Si:C Source and Drain Formed by Post-Epi Implant and Activation AnnealCho, Y. / Zographos, N. / Thirupapuliyur, S. / Moroz, V. et al. | 2007
- 963
-
Novel doping technology for a 1nm NiSi/Si junction with dipoles comforting Schottky (DCS) barrierYamauchi, Takashi / Nishi, Yoshifumi / Tsuchiya, Yoshinori / Kinoshita, Atsuhiro / Koga, Junji / Kato, Koichi et al. | 2007
- 967
-
Process Technology - Interconnect & 3D-IC'sIacoponi, John / Hasegawa, Toshiaki et al. | 2007
- 969
-
32 nm node Ultralow-k(k=2.1)/Cu Damascene Multilevel Interconnect using High-Porosity (50 %) High-Modulus (9 GPa) Self-Assembled Porous SilicaChikaki, S. / Kinoshita, K. / Nakayama, T. / Kohmura, K. / Tanaka, H. / Hirakawa, M. / Soda, E. / Seino, Y. / Hata, N. / Kikkawa, T. et al. | 2007
- 973
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Cost-effective and High Performance Cu Interconnects (keff=2.75) with Continuous SiOCH Stack Incorporating a Low-k Barrier Cap (k=3.1)Ueki, M. / Yamamoto, H. / Ito, F. / Kawahara, J. / Tada, M. / Takeuchi, T. / Saito, S. / Furutake, N. / Onodera, T. / Hayashi, Y. et al. | 2007
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Bulk and interface band diagrams of advanced intermetal dielectricsGuedj, C. / Martinez, E. / Licitra, C. / Imbert, G. / Barnes, J.P. / Lafond, D. / Toffoli, A. / Arnal, V. / Anaud, L. et al. | 2007
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FR-4 and CMOS: Enabling Technologies for Consumer Volume Millimeterwave ApplicationsLaskar, J. / Pinel, S. / Dawn, D. / Sarkar, S. / Sen, P. / Perunama, B. / Yeh, D. et al. | 2007
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-
New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding TechniqueFukushima, Takafumi / Kikuchi, Hirokazu / Yamada, Yusuke / Konno, Takayuki / Liang, Jun / Sasaki, Keiichi / Inamura, Kiyoshi / Tanaka, Tetsu / Koyanagi, Mitsumasa et al. | 2007
- 989
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Highly Reliable Thin MIM Capacitor on Metal (CoM) Structure with Vertical Scalability for Analog/RF ApplicationsInoue, N. / Kume, I. / Kawahara, J. / Furutake, N. / Toda, T. / Matsui, K. / Furumiya, M. / Iwaki, T. / Shida, S. / Hayashi, Y. et al. | 2007
- 993
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Mass Production Worthy MIM Capacitor On Gate polysilicon(MIM-COG) Structure using HfO2/HfOxCyNz/HfO2 Dielectric for Analog/RF/Mixed Signal ApplicationPark, Jung-Min / Song, Min-Woo / Kim, Weon-Hong / Park, Pan-Kwi / Jung, Yong-Kuk / Kim, Ju-Youn / Won, Seok-Jun / Lee, Jong-Ho / Lee, Nae-In / Kang, Ho-Kyu et al. | 2007
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Toward next high performances MIM generation: up to 30fF/μm2 with 3D architecture and high-κ materialsJeannot, S. / Bajolet, A. / Manceau, J.-P. / Cremer, S. / Deloffre, E. / Oddou, J.-P. / Perrot, C. / Benoit, D. / Richard, C. / Bouillon, P. et al. | 2007
- 1001
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Displays, Sensors, and MEMS - Imagers and Optical DetectorsPain, Bedabrata / Bosiers, Jan et al. | 2007
- 1003
-
A 0.5 μm pixel frame-transfer CCD image sensor in 110 nm CMOSFife, Keith / El Gamal, Abbas / Wong, H.-S. Philip et al. | 2007
- 1007
-
Development of a Production-Ready, Back-Illuminated CMOS Image Sensor with Small PixelsJoy, Tom / Pyo, Sunggyu / Park, Sunghyung / Choi, Changhoon / Palsule, Chintamani / Han, Hyungjun / Feng, Chen / Lee, Sangjoo / McKee, Jeff / Altice, Parker et al. | 2007
- 1011
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Two-Transistor Active Pixel Sensor for High Resolution Large Area Digital X-ray ImagingTaghibakhsh, Farhad / Karim, Karim S. et al. | 2007
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Fully Implantable Retinal Prosthesis Chip with Photodetector and Stimulus Current GeneratorTanaka, T. / Sato, K. / Komiya, K. / Kobayashi, T. / Watanabe, T. / Fukushima, T. / Tomita, H. / Kurino, H. / Tamai, M. / Koyanagi, M. et al. | 2007
- 1019
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3 D real-time CCD imager based on Background-Level-Subtraction schemeHashimoto, Y. / Kurihara, F. / Tsunesada, F. / Imai, K. / Takada, Y. / Taniguchi, K. et al. | 2007
- 1023
-
Potentiality of Silicon Optical Modulator Based on Free-Carrier AbsorptionTabei, Tetsuo / Hirata, Tomoki / Kajikawa, Kenta / Sunami, Hideo et al. | 2007
- 1029
-
Extendibility of NiPt Silicide Contacts for CMOS Technology Demonstrated to the 22-nm NodeOhuchi, Kazuya / Lavoie, Christian / Murray, Conal / D'Emic, Chris / Lauer, Isaac / Chu, Jack O. / Yang, Bin / Besser, Paul / Gignac, Lynne / Bruley, John et al. | 2007
- 1032
-
(110) channel, SiON gate-dielectric PMOS with record high Ion=1 mA/μm through channel stress and source drain external resistance (Rext) engineeringYang, B. / Waite, A. / Yin, H. / Yu, J. / Black, L. / Chidambarrao, D. / Domenicucci, A. / Wang, X. / Ku, S. H. / Wang, Y. et al. | 2007
- 1035
-
45nm SOI CMOS Technology with 3X hole mobility enhancement and Asymmetric transistor for high performance CPU applicationFung, Samuel K.H. / Lo, H.C. / Cheng, C.F. / Lu, W.Y. / Wu, K.C. / Chen, K.H. / Lee, D.H. / Liu, Y.H. / Wu, I.L. / Li, C.T. et al. | 2007
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-
Ferrite-Partially-Filled on-Chip RF Inductor Fabricated Using Low-Temperature Nano-Powder-Mixed-Photoresist Filling Technique for Standard CMOSYang, Chen / Liu, Feng / Ren, Tian-Ling / Liu, Li-Tian / Chen, Guang / Guan, Xiao-Kang / Wang, Albert / Yue, Zhen-Xing et al. | 2007
- 1041
-
High Performance 60 nm Gate Length Germanium p-MOSFETs with Ni Germanide Metal Source/DrainYamamoto, Toyoji / Yamashita, Yoshimi / Harada, Masatomi / Taoka, Noriyuki / Ikeda, Keiji / Suzuki, Kunihiro / Kiso, Osamu / Sugiyama, Naoharu / Takagi, Shin-ichi et al. | 2007