Models for the coupling of light into multimode waveguides (English)
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In:
Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects
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141-144
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2004
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ISBN:
- Conference paper / Electronic Resource
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Title:Models for the coupling of light into multimode waveguides
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Contributors:
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Published in:
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Publisher:
- New search for: IEEE
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Publication date:2004-01-01
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Size:340739 byte
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ISBN:
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DOI:
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Type of media:Conference paper
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Type of material:Electronic Resource
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Language:English
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Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
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Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects (IEEE Cat. No.04EX845)| 2004
- 1
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Proceedings - 8th IEEE Workshop on Signal Propagation on Interconnects| 2004
- 2
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Copyright| 2004
- 3
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ForewordGrabinski, H. / Arz, U. et al. | 2004
- 5
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SPI 2004 Committees| 2004
- 7
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Table of Contents| 2004
- 15
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Breaker Page| 2004
- 17
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Presentation of a new time domain simulation tool and application to the analysis of advanced interconnect performance dependence on design and process parametersFarcy, A. / Cueto, O. / Blampey, B. / Lacrevaz, T. / Flechet, B. / de Crecy, F. / Torres, J. et al. | 2004
- 21
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An enhanced transmission line model for full-wave analysis of interconnects in non-homogeneous dielectricsMaffucci, A. / Miano, G. / Villone, F. et al. | 2004
- 25
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A new integral-equation-based, full-wave layered interconnect simulatorZhaohui Zhu, / Xing Wang, / Dvorak, S.L. / Prince, J.L. et al. | 2004
- 31
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Analysis of power delivery network constructed by irregular-shaped power/ground plane including densely populated via-holeHeeseok Lee, / Young-Seok Hong, / Dongguen Kam, / Joungho Kim, et al. | 2004
- 35
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Sensitivity analysis of generic on-chip /spl Delta/I-noise simulation methodologyHuber, A. / Kemmler, B. / Klink, E. et al. | 2004
- 39
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Modelling the dynamic response of on-chip decoupling capacitorsVazquez, J.R. / Meijer, M. et al. | 2004
- 45
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Influence of damping and voltage dependent leakage resistance on mid-frequency power noiseGarben, B. / Paech, A. et al. | 2004
- 49
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PEEC methods in 2D signal line modeling for mid-frequency on-chip power supply noise simulationsRauscher, J. / Pfleiderer, H.-J. et al. | 2004
- 53
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Dampening high frequency noise in high performance microprocessor packagingArabi, T. / Gang Ji, / Taylor, G. et al. | 2004
- 59
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A new in-situ approach to flip-chip interconnect characterization up to millimeter wave frequenciesPfeiffer, U.R. / Chandrasekhar, A. / Zwick, T. et al. | 2004
- 63
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Issues and challenges of Gbps backplane connector characterizationSchuster, C. / Kwark, Y.H. / Frech, R. / Klink, E. / Diepenbrock, J.C. / Edlund, G.R. / Gneiting, T. / Modinger, R. et al. | 2004
- 67
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Application of test structures for monitoring of high frequency characteristics of organic substrate materialsSalhi, F. / Sommer, G. / John, W. / Reichl, H. et al. | 2004
- 73
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A 0.18/spl mu/m CMOS fully integrated 6.25Gbps single aggressor multi-rate crosstalk cancellation IC for legacy backplane and interconnect applicationsBien, F. / Raghavan, A. / Nami, Z. / Lee, C.-H. / Kim, A. / Vrazel, M. / Gebara, E. / Bajekal, S. / Schmukler, B. / Laskar, J. et al. | 2004
- 77
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Cross-talk noise in repeater networksKorshak, A.N. et al. | 2004
- 81
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Analysis of crosstalk coupling effects between aggressor and victim interconnect using two-port network modelPalit, A.K. / Meyer, V. / Anheier, W. / Schloeffel, J. et al. | 2004
- 85
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Crosstalk in product related bus systems using 110 nm CMOS technologyKtata, M.F. / Grabinski, H. / Arz, U. / Fischer, H. et al. | 2004
- 91
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A fast algorithm for near optimal passive reduction of high-speed interconnect networksSaraswat, D. / Achar, R. / Nakhla, M. et al. | 2004
- 95
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Efficient GA-inspired macro-modeling of general LTI multi-port systemsDeschrijver, D. / Dhaene, T. et al. | 2004
- 99
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Black-box modelling by rational function approximationRong Gao, / Mekonnen, Y.S. / Beyene, W.T. / Schutt-Aine, J.E. et al. | 2004
- 103
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Time delay identification for transmission line modelingGustavsen, B. et al. | 2004
- 109
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Non-uniform grid (NG) algorithm for fast capacitance extractionBoag, A. / Livshitz, B. et al. | 2004
- 113
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Illustration of the importance of on-chip self and mutual inductancesLopez, A. / Deschacht, D. et al. | 2004
- 117
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Modeling capacitance of on-chip coplanar transmission lines over the silicon substrateGordin, R. / Goren, D. et al. | 2004
- 121
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Effect of inductance on interconnect propagation delay in VLSI circuitsLigocka, A. / Bandurski, W. et al. | 2004
- 127
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Implementation of MOR for time domain simulation on real-life interconnect structuresHeres, P. / Niehof, J. / Schilders, W. et al. | 2004
- 131
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Behavioral macromodels of differential driversStievano, I.S. / Siviero, C. / Maio, I.A. / Canavero, F. et al. | 2004
- 135
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Efficient algorithm for sensitivity analysis of nonuniform transmission linesGad, E. / Nakhla, M. et al. | 2004
- 141
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Models for the coupling of light into multimode waveguidesKolleck, C. / Stallein, M. / Mrozynski, G. et al. | 2004
- 145
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Nontransversal electrostatic fields in cable modelsNahring, T. et al. | 2004
- 151
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Time-domain modeling of lossy substrates with constant loss tangentEngin, A.E. / Mathis, W. / John, W. / Sommer, G. / Reichl, H. et al. | 2004
- 155
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A novel modeling approach for multiple coupled wire bond interconnectsDoerr, I. / Sommer, G. / Reichl, H. et al. | 2004
- 161
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Electromagnetic interference produced by printed dipole antennas for MCM wireless RF clock distributionKadi, M. / Ndagijimana, F. / Dansou, J. et al. | 2004
- 165
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A new test structure for measuring on-chip cross-coupling capacitancesBogliolo, A. / Vaira, F. / Vendrame, L. / Bortesi, L. et al. | 2004
- 167
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Bounding bus delay and noise effects of on-chip inductanceLinderman, M. / Harris, D. / Diaz, D. et al. | 2004
- 171
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A frequency domain approach for efficient model reduction of mixed VLSI circuitsAmghayrir, A. / Brehonnet, P. / Tanguy, N. / Vilbe, P. / Calvez, L.C. / Huret, F. et al. | 2004
- 175
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Screening attenuation of differential cable-connector assembliesHekkala, A. / Tarvainen, T. et al. | 2004
- 179
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A 0.18/spl mu/m-CMOS near-end crosstalk (NEXT) noise canceller for 4-PAM/20Gbps throughput transmission over backplane channelsHur, Y. / Chun, C. / Maeng, M. / Kim, H. / Chandramouli, S. / Gebara, E. / Laskar, J. et al. | 2004
- 183
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Modeling of 3D packages using EM simulatorsKelander, I. / Arslan, A.N. / Hyvonen, L. / Kangasmaa, S. et al. | 2004
- 187
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On the modelling of interconnection discontinuitiesKondratyev, V. et al. | 2004
- 189
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Electrical performance of single and coupled Cu interconnects for the 70 nm technologyElbouazzati, K. / Ponchei, F. / Legier, J.F. / Paleczny, E. / Seguinot, C. / Deschacht, D. et al. | 2004
- 193
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Effects of mode conversion on parasitic coupling in high-speed VLSI circuitsQuere, Y. / Le Gouguec, T. / Martin, P.M. / Le Berre, D. / Huret, F. et al. | 2004
- 197
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Crosstalk bounds in interconnects with random parametersBecherini, G. / Musolino, A. / Raugi, M. et al. | 2004
- 201
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Layout synthesis algorithm of embedded passive components for RF and EMC reliable system designSommer, G. / John, W. / Reichl, H. et al. | 2004
- 205
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Analysis of chip-to-chip power noise coupling on several SDRAM modulesJae-Kyung Wee, / Seongsoo Lee, / Yong-Ju Kim, et al. | 2004
- 209
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Investigating the global suppression of the power/ground plane noiseAbhari, R. / Eleftheriades, G.V. et al. | 2004
- 211
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Characterization of via holes on printed circuit boardsAntonini, G. / Lai, M. / Orlandi, A. / Ricchiuti, V. et al. | 2004
- 215
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Electrical high speed chip-package characterization comparison of simulation results with component measurementMiersch, E. / Gospodinova, M. / Nan, G. / Thomas, J. / Held, J. et al. | 2004