Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structures (English)
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- New search for: Bandyopadhyay, Chandan
- New search for: Das, Rakesh
- New search for: Chattopadhyay, Anupam
- New search for: Rahaman, Hafizur
- New search for: Bandyopadhyay, Chandan
- New search for: Das, Rakesh
- New search for: Chattopadhyay, Anupam
- New search for: Rahaman, Hafizur
In:
IET Computers & Digital Techniques
;
13
, 1
;
38-48
;
2018
- Article (Journal) / Electronic Resource
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Title:Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structures
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Contributors:Bandyopadhyay, Chandan ( author ) / Das, Rakesh ( author ) / Chattopadhyay, Anupam ( author ) / Rahaman, Hafizur ( author )
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Published in:IET Computers & Digital Techniques ; 13, 1 ; 38-48
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Publisher:
- New search for: The Institution of Engineering and Technology
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Publication date:2018-09-27
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Size:11 pages
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ISSN:
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DOI:
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Type of media:Article (Journal)
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Type of material:Electronic Resource
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Language:English
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Keywords:and-inverter graph , functional abstraction , data structures , MIG-based graph data structure , quantum computing , AIG-based graph data structure , graph theory , logic gates , intermediate representations , graph-based IR , Boolean functions , Boolean function synthesis , reversible circuit design , quantum technologies , majority inverter graph , cost parameters , reversible circuit synthesis , binary decision diagram , reversible logic synthesis , truth table , logic design , circuit abstraction , logic circuits
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Source:
Metadata by IET is licensed under CC BY 3.0
Table of contents – Volume 13, Issue 1
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
-
State retained dual-Vth feedback sleeper-stack for leakage reductionSreekala, Kollaparampil Somasekharan / Krishnakumar, Sukumarapillai et al. | 2018
- 11
-
ON–OFF: a reactive routing algorithm for dynamic thermal management in 3D NoCsTaheri, Ebadollah / Mohammadi, Karim / Patooghy, Ahmad et al. | 2018
- 20
-
CUDA memory optimisation strategies for motion estimationSayadi, Fatma Elzahra / Chouchene, Marwa / Bahri, Haithem / Khemiri, Randa / Atri, Mohamed et al. | 2018
- 28
-
FPGA-based implementation of cuckoo searchAlfailakawi, Mohammad Gh. / El-Shafei, Mohammed / Ahmad, Imtiaz / Salman, Ayed et al. | 2018
- 38
-
Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structuresBandyopadhyay, Chandan / Das, Rakesh / Chattopadhyay, Anupam / Rahaman, Hafizur et al. | 2018
- 49
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Investigating the role of interconnect surface roughness towards the design of power-aware network on chipKumar, Somesh / Sharma, Rohit et al. | 2018