Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage-Frequency MPSoC Platforms (English)
- New search for: Ruggiero, M.
- New search for: Ruggiero, M.
- New search for: Bertozzi, D.
- New search for: Benini, L.
- New search for: Milano, M.
- New search for: Andrei, A.
In:
IEEE transactions on computer-aided design of integrated circuits and systems
;
28
, 3
; 378-391
;
2009
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ISSN:
- Article (Journal) / Print
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Title:Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage-Frequency MPSoC Platforms
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Contributors:
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Published in:
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Publisher:
- New search for: Institute of Electrical and Electronics Engineers
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Place of publication:New York, NY
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Publication date:2009
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ISSN:
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ZDBID:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
- New search for: 770/3155/5670
- New search for: 53.52 / 33.72 / 33.61 / 53.51
- Further information on Basic classification
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Keywords:
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Classification:
Local classification TIB: 770/3155/5670 BKL: 53.52 Elektronische Schaltungen / 33.72 Halbleiterphysik / 33.61 Festkörperphysik / 53.51 Bauelemente der Elektronik -
Source:
Table of contents – Volume 28, Issue 3
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 305
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Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming FrameworkQiang Liu, / Constantinides, G.A. / Masselos, K. / Cheung, P. et al. | 2009
- 305
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FPGA Design - Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming FrameworkLiu, Q. et al. | 2009
- 316
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Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip DesignSengupta, D. / Saleh, R.A. et al. | 2009
- 316
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Low Power Design - Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip DesignSengupta, D. et al. | 2009
- 327
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Semicustom Design of Zigzag Power-Gated Circuits in Standard Cell ElementsYoungsoo Shin, / Seungwhun Paik, / Hyung-Ock Kim, et al. | 2009
- 340
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Physical Design - Detailed-Routing Algorithms for Dense Pin Clusters in Integrated CircuitsOzdal, M.M. et al. | 2009
- 340
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Detailed-Routing Algorithms for Dense Pin Clusters in Integrated CircuitsOzdal, M.M. et al. | 2009
- 350
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Fast and Accurate Statistical Criticality Computation Under Process VariationsMogal, H.D. / Qian, H. / Sapatnekar, S.S. / Bazargan, K. et al. | 2009
- 350
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Statistical Design - Fast and Accurate Statistical Criticality Computation Under Process VariationsMogal, H.D. et al. | 2009
- 364
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A Methodology for Constraint-Driven Synthesis of On-Chip CommunicationsPinto, A. / Carloni, L.P. / Sangiovanni-Vincentelli, A.L. et al. | 2009
- 364
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System Design - A Methodology for Constraint-Driven Synthesis of On-Chip CommunicationsPinto, A. et al. | 2009
- 378
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Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC PlatformsRuggiero, M. / Bertozzi, D. / Benini, L. / Milano, M. / Andrei, A. et al. | 2009
- 392
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Reliability Analysis of Logic CircuitsChoudhury, M.R. / Mohanram, K. et al. | 2009
- 392
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Testing - Reliability Analysis of Logic CircuitsChoudhury, M.R. et al. | 2009
- 406
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Diagnosis of Multiple-Voltage Design With Bridge DefectKhursheed, S. / Al-Hashimi, B.M. / Reddy, S.M. / Harrod, P. et al. | 2009
- 417
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Efficient Boolean Characteristic Function for Timed Automatic Test Pattern GenerationYu-Min Kuo, / Yue-Lung Chang, / Shih-Chieh Chang, et al. | 2009
- 426
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Double–Single Stuck-at Faults: A Delay Fault Model for Synchronous Sequential CircuitsPomeranz, I. / Reddy, S.M. et al. | 2009
- 433
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Automated Interface Refinement for Compositional VerificationHaiqiong Yao, / Hao Zheng, et al. | 2009
- 433
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Verification - Automated Interface Refinement for Compositional VerificationYao, H. et al. | 2009
- 447
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SHORT PAPERS - Determination of Floquet Exponents for Small-Signal Analysis of Nonlinear Periodic CircuitsBrambilla, A. et al. | 2009
- 447
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Determination of Floquet Exponents for Small-Signal Analysis of Nonlinear Periodic CircuitsBrambilla, A. / Gruosso, G. / Gajani, G.S. et al. | 2009
- 451
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${\ssr HLS}\hbox{-}{\ssr pg}$: High-Level Synthesis of Power-Gated CircuitsEunjoo Choi, / Changsik Shin, / Youngsoo Shin, et al. | 2009
- 451
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HLS-pg: High-Level Synthesis of Power-Gated CircuitsChoi, E. et al. | 2009
- 451
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Formula Not Shown : High-Level Synthesis of Power-Gated CircuitsEunjoo, C. / Changsik, S. / Youngsoo, S. et al. | 2009
- 456
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Spare Cells With Constant Insertion for Engineering ChangeYu-Min Kuo, / Ya-Ting Chang, / Shih-Chieh Chang, / Marek-Sadowska, M. et al. | 2009
- 461
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Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache ArchitecturesShrivastava, A. / Issenin, I. / Dutt, N. / Sanghyun Park, / Yunheung Paek, et al. | 2009
- 466
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ANNOUNCEMENTS - Information for Authors| 2009
- 466
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems information for authors| 2009
- 467
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Order Form for Reprints| 2009
- 468
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The IEEE Digital Library| 2009
- C1
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Table of contents| 2009
- C2
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information| 2009
- C3
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information| 2009