A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based Stacking (English)
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In:
IEEE journal of solid state circuits
;
47
, 1
; 107-117
;
2012
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ISSN:
- Article (Journal) / Print
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Title:A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based Stacking
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Contributors:
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Published in:IEEE journal of solid state circuits ; 47, 1 ; 107-117
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Publisher:
- New search for: IEEE
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Place of publication:New York, NY
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Publication date:2012
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
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Table of contents – Volume 47, Issue 1
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Table of contents| 2012
- 3
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Introduction to the Special Issue on the 2011 IEEE International Solid-State Circuits ConferenceWang, A et al. | 2012
- 8
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ENERGY EFFICIENT DIGITAL PAPERS - A Highly Parallel and Scalable CABAC Decoder for Next Generation Video CodingSze, V et al. | 2012
- 8
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A Highly Parallel and Scalable CABAC Decoder for Next Generation Video CodingSze, V. / Chandrakasan, A. P. et al. | 2012
- 23
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A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOSDongsuk Jeon, / Mingoo Seok, / Chakrabarti, C. / Blaauw, D. / Sylvester, D. et al. | 2012
- 35
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A 28 nm 0.6 V Low Power DSP for Mobile ApplicationsIckes, N. / Gammie, G. / Sinangil, M. E. / Rithe, R. / Gu, J. / Wang, A. / Mair, H. / Datla, S. R. / Rong, B. / Honnavara-Prasad, S. et al. | 2012
- 47
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A 62 mV 0.13 μm CMOS Standard-Cell-Based Design Technique Using Schmitt-Trigger LogicLotze, N et al. | 2012
- 47
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A 62 mV 0.13 $\mu$ m CMOS Standard-Cell-Based Design Technique Using Schmitt-Trigger LogicLotze, N. / Manoli, Y. et al. | 2012
- 61
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A 70-Mb/s 100.5-dBm Sensitivity 65-nm LP MIMO Chipset for WiMAX Portable RouterShyuan Liao, / Yen-Shuo Chang, / Chia-Hsin Wu, / Hung-Chieh Tsai, / Hsin-Hua Chen, / Min Chen, / Ching-Wen Hsueh, / Jian-Bang Lin, / Den-Kai Juang, / Shun-An Yang, et al. | 2012
- 75
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A 151-mm$^{2}$ 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS TechnologyFukuda, K. / Watanabe, Y. / Makino, E. / Kawakami, K. / Sato, J. / Takagiwa, T. / Kanagawa, N. / Shiga, H. / Tokiwa, N. / Shindo, Y. et al. | 2012
- 75
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A 151-mm Formula Not Shown 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS TechnologyFukuda, K. / Watanabe, Y. / Makino, E. / Kawakami, K. / Sato, J. / Takagiwa, T. / Kanagawa, N. / Shiga, H. / Tokiwa, N. / Shindo, Y. et al. | 2012
- 75
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MEMORY PAPERS - A 151-mm2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS TechnologyFukuda, K et al. | 2012
- 85
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Highly Reliable and Low Power SSD Using Asymmetric Coding and Stripe Bitline-Pattern Elimination ProgrammingTanakamaru, S. / Hung, C. / Takeuchi, K. et al. | 2012
- 97
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A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability EnhancementsPilo, H. / Arsovski, I. / Batson, K. / Braceras, G. / Gabric, J. / Houle, R. / Lamphier, S. / Radens, C. / Seferagic, A. et al. | 2012
- 107
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A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 $\times$ 128 I/Os Using TSV Based StackingJung-Sik Kim, / Chi Sung Oh, / Hocheol Lee, / Donghyuk Lee, / Hyong Ryol Hwang, / Sooman Hwang, / Byongwook Na, / Joungwook Moon, / Jin-Guk Kim, / Hanna Park, et al. | 2012
- 107
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A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 Formula Not Shown 128 I/Os Using TSV Based StackingKim, J. S. / Oh, C. S. / Lee, H. / Lee, D. / Hwang, H. R. / Hwang, S. / Na, B. / Moon, J. / Kim, J. G. / Park, H. et al. | 2012
- 107
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A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based StackingKim, J-S et al. | 2012
- 117
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An Energy-Efficient and High-Speed Mobile Memory I/O Interface Using Simultaneous Bi-Directional Dual (Base+RF)-Band SignalingGyung-Su Byun, / Yanghyo Kim, / Jongsun Kim, / Sai-Wang Tam, / Chang, Mau-Chung Frank et al. | 2012
- 131
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A 1.6 V 1.4 Gbp/s/pin Consumer DRAM With Self-Dynamic Voltage Scaling Technique in 44 nm CMOS TechnologyHyun-Woo Lee, / Ki-Han Kim, / Young-Kyoung Choi, / Ju-Hwan Sohn, / Nak-Kyu Park, / Kwan-Weon Kim, / Chulwoo Kim, / Young-Jung Choi, / Byong-Tae Chung, et al. | 2012
- 141
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A Low-Voltage 1 Mb FRAM in 0.13 μm CMOS Featuring Time-to-Digital Sensing for Expanded Operating MarginQazi, M et al. | 2012
- 141
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A Low-Voltage 1 Mb FRAM in 0.13 $\mu$m CMOS Featuring Time-to-Digital Sensing for Expanded Operating MarginQazi, M. / Clinton, M. / Bartling, S. / Chandrakasan, A. P. et al. | 2012
- 151
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HIGH PERFORMANCE DIGITAL PAPERS - Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise SystemWarnock, J et al. | 2012
- 151
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Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise SystemWarnock, J. / Yiu-Hing Chan, / Carey, S. / Huajun Wen, / Meaney, P. / Gerwig, G. / Smith, H. H. / Yuen Chan, / Davis, J. / Bunce, P. et al. | 2012
- 164
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Design of the Two-Core x86-64 AMD “Bulldozer” Module in 32 nm SOI CMOSMcIntyre, H. / Arekapudi, S. / Busta, E. / Fischer, T. / Golden, M. / Horiuchi, A. / Meneghini, T. / Naffziger, S. / Vinh, J. et al. | 2012
- 177
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A 32 nm, 3.1 Billion Transistor, 12 Wide Issue Itanium® Processor for Mission-Critical ServersRiedlinger, Reid / Arnold, Ron / Biro, Larry / Bowhill, B. / Crop, J. / Duda, K. / Fetzer, E. S. / Franza, O. / Grutkowski, T. / Little, C. et al. | 2012
- 194
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A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm ProcessorYuffe, M. / Mehalel, M. / Knoll, E. / Shor, J. / Kurts, T. / Altshuler, E. / Fayneh, E. / Luria, K. / Zelikson, M. et al. | 2012
- 206
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A Fully-Integrated 3-Level DC-DC Converter for Nanosecond-Scale DVFSWonyoung Kim, / Brooks, D. / Gu-Yeon Wei, et al. | 2012
- 220
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A Low-Power Integrated x86–64 and Graphics Processor for Mobile Computing DevicesFoley, D. / Bansal, P. / Cherepacha, D. / Wasmuth, R. / Gunasekar, A. / Gutta, S. / Naini, A. et al. | 2012
- 220
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A Low-Power Integrated ;64 and Graphics Processor for Mobile Computing DevicesFoley, D. / Bansal, P. / Cherepacha, D. / Wasmuth, R. / Gunasekar, A. / Gutta, S. / Naini, A. et al. | 2012
- 232
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A 0.013 ${\hbox {mm}}^{2}$, 5 $\mu\hbox{W}$ , DC-Coupled Neural Signal Acquisition IC With 0.5 V SupplyMuller, R. / Gambini, S. / Rabaey, J. M. et al. | 2012
- 232
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IMAGING, MEMS, MEDICAL AND DISPLAYS PAPERS - A 0.013 mm2, 5 μW, DC-Coupled Neural Signal Acquisition IC With 0.5 V SupplyMuller, R et al. | 2012
- 244
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A Neural Stimulator Frontend With High-Voltage Compliance and Programmable Pulse Shape for Epiretinal ImplantsNoorsal, E. / Sooksood, K. / Hongcheng Xu, / Hornig, R. / Becker, J. / Ortmanns, M. et al. | 2012
- 257
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A Light-Field Image Sensor in 180 nm CMOSWang, Albert / Molnar, Alyosha et al. | 2012
- 272
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A Low-Noise High Intrascene Dynamic Range CMOS Image Sensor With a 13 to 19b Variable-Resolution Column-Parallel Folding-Integration/Cyclic ADCMin-Woong Seo, / Sung-Ho Suh, / Iida, T. / Takasawa, T. / Isobe, K. / Watanabe, T. / Itoh, S. / Yasutomi, K. / Kawahito, S. et al. | 2012
- 284
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TECHNOLOGY DIRECTIONS PAPERS - An 8 Bit, 40-Instructions-Per-Second Organic Microprocessor on Plastic FoilMyny, K et al. | 2012
- 284
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An 8-Bit, 40-Instructions-Per-Second Organic Microprocessor on Plastic FoilMyny, K. / van Veenendaal, E. / Gelinck, G. H. / Genoe, J. / Dehaene, W. / Heremans, P. et al. | 2012
- 292
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A 3.3 V 6-Bit 100 kS/s Current-Steering Digital-to-Analog Converter Using Organic P-Type Thin-Film Transistors on GlassZaki, Tarek / Ante, F. / Zschieschang, U. / Butschke, J. / Letzkus, F. / Richter, H. / Klauk, H. / Burghartz, J. N. et al. | 2012
- 301
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A 100-V AC Energy Meter Integrating 20-V Organic CMOS Digital and Analog Circuits With a Floating Gate for Process Variation Compensation and a 100-V Organic pMOS RectifierIshida, K. / Tsung-Ching Huang, / Honda, K. / Sekitani, T. / Nakajima, H. / Maeda, H. / Takamiya, M. / Someya, T. / Sakurai, T. et al. | 2012
- 310
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A 0.24-nJ/b Wireless Body-Area-Network Transceiver With Scalable Double-FSK ModulationJoonsung Bae, / Kiseok Song, / Hyungwoo Lee, / Hyunwoo Cho, / Hoi-Jun Yoo, et al. | 2012
- 323
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A 75 Formula Not Shown W Real-Time Scalable Body Area Network Controller and a 25 Formula Not Shown W ExG Sensor IC for Compact Sleep Monitoring ApplicationsLee, S. / Yan, L. / Roh, T. / Hong, S. / Yoo, H. J. et al. | 2012
- 323
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A 75 μW Real-Time Scalable Body Area Network Controller and a 25 μW ExG Sensor IC for Compact Sleep Monitoring ApplicationsLee, S et al. | 2012
- 323
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A 75 $\mu$ W Real-Time Scalable Body Area Network Controller and a 25 $\mu$W ExG Sensor IC for Compact Sleep Monitoring ApplicationsSeulki Lee, / Long Yan, / Taehwan Roh, / Sunjoo Hong, / Hoi-Jun Yoo, et al. | 2012
- 335
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A 3-μW CMOS Glucose Sensor for Wireless Contact-Lens Tear Glucose MonitoringLiao, Y-T et al. | 2012
- 335
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A 3-$\mu\hbox{W}$ CMOS Glucose Sensor for Wireless Contact-Lens Tear Glucose MonitoringYu-Te Liao, / Huanfen Yao, / Lingley, Andrew / Parviz, B. / Otis, B. P. et al. | 2012
- 345
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Silicon Photonic Switches Hybrid-Integrated With CMOS DriversRylyakov, A. V. / Schow, C. L. / Lee, B. G. / Green, W. M. J. / Assefa, S. / Doany, F. E. / Yang, M. / Van Campenhout, J. / Jahnes, C. V. / Kash, J. A. et al. | 2012
- 355
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2012 Bipolar/BiCMOS Circuits and Technology Meeting| 2012
- 356
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2010 Symposium on VLSI Circuits| 2012
- C2
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IEEE Journal of Solid-State Circuits publication information| 2012
- C3
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IEEE Journal of Solid-State Circuits information for authors| 2012
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SPECIAL ISSUE ON THE 2011 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE| 2012