An 18.7-Gb/s 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-Chip (English)
- New search for: Xinmin Yu
- New search for: Xinmin Yu
- New search for: Rashtian, Hooman
- New search for: Mirabbasi, Shahriar
- New search for: Pande, Partha Pratim
- New search for: Deukhyoun Heo
In:
IEEE transactions on circuits and systems / 1
;
62
, 3
; 799-806
;
2015
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ISSN:
- Article (Journal) / Print
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Title:An 18.7-Gb/s 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-Chip
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Contributors:Xinmin Yu ( author ) / Rashtian, Hooman / Mirabbasi, Shahriar / Pande, Partha Pratim / Deukhyoun Heo
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Published in:IEEE transactions on circuits and systems / 1 ; 62, 3 ; 799-806
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Publisher:
- New search for: Institute of Electrical and Electronics Engineers
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Place of publication:New York, NY
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Publication date:2015
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ISSN:
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ZDBID:
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DOI:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
- New search for: 770/5650
- New search for: 53.50 / 53.55 / 53.70
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Source:
Table of contents – Volume 62, Issue 3
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 617
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Power Management Analysis of Inductively-Powered Implants with 1X/2X Reconfigurable RectifierLi, Xing / Tsui, Chi-Ying / Ki, Wing-Hung et al. | 2015
- 625
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Comparative Analysis of Simulation-Based Methods for Deriving the Phase- and Gain-Margins of Feedback Circuits With Op-AmpsNeag, Marius / Onet, Raul / Kovacs, Istvan / Martari, Paul et al. | 2015
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A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier With a Two-Phase PVT-Calibrator for $\Delta\Sigma$ PLLsLee, Yongsun / Kim, Mina / Seong, Taeho / Choi, Jaehyouk et al. | 2015
- 635
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A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier With a Two-Phase PVT-Calibrator for Formula Not Shown PLLsYongsun, L. / Mina, K. / Taeho, S. / Jaehyouk, C. et al. | 2015
- 645
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A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time $\Sigma\Delta$ ADC for a Digital Closed-Loop Class-D AmplifierDonida, Achille / Cellier, Remy / Nagari, Angelo / Malcovati, Piero / Baschirotto, Andrea et al. | 2015
- 645
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A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time [Formula Omitted] ADC for a Digital Closed-Loop Class-D AmplifierAchille Donida et al. | 2015
- 645
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A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time Formula Not Shown ADC for a Digital Closed-Loop Class-D AmplifierDonida, A. / Cellier, R. / Nagari, A. / Malcovati, P. / Baschirotto, A. et al. | 2015
- 654
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PN-Assisted Deterministic Digital Background Calibration of Multistage Split-Pipelined ADCSarkar, Sudipta / Zhou, Yuan / Elies, Brian / Chiu, Yun et al. | 2015
- 662
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A 1.2-V 4.2- Formula Not Shown High-Order Curvature-Compensated CMOS Bandgap ReferenceQuanzhen, D. / Jeongjin, R. et al. | 2015
- 662
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A 1.2-V 4.2- \hbox/^\hbox High-Order Curvature-Compensated CMOS Bandgap ReferenceQuanzhen Duan et al. | 2015
- 662
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A 1.2-V 4.2- $\hbox{ppm}/^{\circ}\hbox{C}$ High-Order Curvature-Compensated CMOS Bandgap ReferenceDuan, Quanzhen / Roh, Jeongjin et al. | 2015
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A 1.2-V 4.2-[Formula Omitted] High-Order Curvature-Compensated CMOS Bandgap ReferenceQuanzhen Duan et al. | 2015
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A Comparative Analysis of Phase-Domain ADC and Amplitude-Domain IQ ADCLiu, Yao / Lotfi, Reza / Hu, Yongchang / Serdijn, Wouter A. et al. | 2015
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A 6-to-10-Bit 0.5 V-to-0.9 V Reconfigurable 2 MS/s Power Scalable SAR ADC in 0.18 \mu CMOSZhangming Zhu et al. | 2015
- 689
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A 6-to-10-Bit 0.5 V-to-0.9 V Reconfigurable 2 MS/s Power Scalable SAR ADC in 0.18 Formula Not Shown CMOSZhangming, Z. / Zheng, Q. / Maliang, L. / Ruixue, D. et al. | 2015
- 689
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A 6-to-10-Bit 0.5 V-to-0.9 V Reconfigurable 2 MS/s Power Scalable SAR ADC in 0.18 $\mu{\rm m}$ CMOSZhu, Zhangming / Qiu, Zheng / Liu, Maliang / Ding, Ruixue et al. | 2015
- 697
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An Ultra-Low Voltage Level Shifter Using Revised Wilson Current Mirror for Fast and Energy-Efficient Wide-Range Voltage Conversion from Sub-Threshold to I/O VoltageZhou, Jun / Wang, Chao / Liu, Xin / Zhang, Xin / Je, Minkyu et al. | 2015
- 707
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A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply RejectionLu, Yan / Wang, Yipeng / Pan, Quan / Ki, Wing-Hung / Yue, C. Patrick et al. | 2015
- 717
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Phase Noise Effect on Sine-Shaped Feedback DACs Used in Continuous-Time $\Sigma\Delta$ ADCsAshry, Ahmed / Belfort, Diomadson / Aboushady, Hassan et al. | 2015
- 717
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Phase Noise Effect on Sine-Shaped Feedback DACs Used in Continuous-Time Formula Not Shown ADCsAshry, A. / Belfort, D. / Aboushady, H. et al. | 2015
- 725
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Optimal Tuning of Inductive Wireless Power Links: Limits of PerformanceHalpern, Mark E. / Ng, David C. et al. | 2015
- 733
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A Heterogeneous Reconfigurable Cell Array for MIMO Signal ProcessingZhang, Chenxin / Liu, Liang / Markovic, Dejan / Owall, Viktor et al. | 2015
- 743
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A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter SuppressionSu, Ming-Chiuan / Chen, Wei-Zen / Wu, Pei-Si / Chen, Yu-Hsiang / Lee, Chao-Cheng / Jou, Shyh-Jye et al. | 2015
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A 60 V Tolerance Transceiver With ESD Protection for FlexRay-Based Communication SystemsWang, Chua-Chin / Chen, Chih-Lin / Hou, Zong-You / Hu, Yi / Lee, Jam-Wem / Lin, Wan-Yen / Chang, Yi-Feng / Hsu, Chia-Wei / Song, Ming-Hsiang et al. | 2015
- 761
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A High-Throughput VLSI Architecture for Hard and Soft SC-FDMA MIMO DetectorsNeshatpour, Katayoun / Shabany, Mahdi / Gulak, Glenn et al. | 2015
- 771
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Highly Reliable Coding Methods for Emerging Applications: Archive and Enterprise Solid-State Drives (SSDs)Tanakamaru, Shuhei / Kitamura, Yuta / Yamazaki, Senju / Tokutomi, Tsukasa / Takeuchi, Ken et al. | 2015
- 781
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Analysis and Design of a Core-Size-Scalable Low Phase Noise $LC$ -VCO for Multi-Standard Cellular TransceiversSeong, Taeho / Kim, Jae Joon / Choi, Jaehyouk et al. | 2015
- 781
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Analysis and Design of a Core-Size-Scalable Low Phase Noise [Formula Omitted]-VCO for Multi-Standard Cellular TransceiversTaeho Seong et al. | 2015
- 781
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Analysis and Design of a Core-Size-Scalable Low Phase Noise Formula Not Shown -VCO for Multi-Standard Cellular TransceiversTaeho, S. / Jae, J. K. / Jaehyouk, C. et al. | 2015
- 791
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Superregenerative Reception of Narrowband FSK ModulationsPala-Schonwalder, Pere / Bonet-Dalmau, Jordi / Lopez-Riera, Alexis / Moncunill-Geniz, F. Xavier / del Aguila-Lopez, Francisco / Giralt-Mas, Rosa et al. | 2015
- 799
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An 18.7-Gb/s 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-ChipYu, Xinmin / Rashtian, Hooman / Mirabbasi, Shahriar / Pande, Partha Pratim / Heo, Deukhyoun et al. | 2015
- 807
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Selective State Retention Power Gating Based on Formal VerificationGreenberg, Shlomo / Rabinowicz, Joseph / Manor, Erez et al. | 2015
- 816
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An Analytical Approach to Thermal Design and Optimization With a Temperature-Dependent Power ModelShim, Seongbo / Lee, Jae Wook / Shin, Youngsoo et al. | 2015
- 825
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Distributed Consensus of Multi-Agent Systems With Input Constraints: A Model Predictive Control ApproachCheng, Zhaomeng / Zhang, Hai-Tao / Fan, Ming-Can / Chen, Guanrong et al. | 2015
- 835
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Variations in Nanometer CMOS Flip-Flops: Part II—Energy Variability and Impact of Other Sources of VariationsAlioto, Massimo / Consoli, Elio / Palumbo, Gaetano et al. | 2015
- 844
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Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State StorageTanakamaru, Shuhei / Yamazawa, Hiroki / Tokutomi, Tsukasa / Ning, Sheyang / Takeuchi, Ken et al. | 2015
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Efficient Subquadratic Space Complexity Architectures for Parallel MPB Single- and Double-Multiplications for All Trinomials Using Toeplitz Matrix-Vector Product DecompositionLee, Chiou-Yng / Meher, Pramod Kumar et al. | 2015
- 863
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Fine-Grained Critical Path Analysis and Optimization for Area-Time Efficient Realization of Multiple Constant MultiplicationsLou, Xin / Yu, Ya Jun / Meher, Pramod Kumar et al. | 2015
- 873
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SoC-Based Architecture for an Ultrasonic Phased Array With Encoded TransmissionsPerez, Maria Carmen / Garcia, Rodrigo / Hernandez, Alvaro / Jimenez, Ana / Diego, Cristina / Urena, Jesus et al. | 2015
- 881
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Low-Latency High-Throughput Systolic Multipliers Over GF(2^) for NIST Recommended PentanomialsJiafeng Xie et al. | 2015
- 881
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Low-Latency High-Throughput Systolic Multipliers Over Formula Not Shown for NIST Recommended PentanomialsJiafeng, X. / Meher, P. K. / Zhi-Hong, M. et al. | 2015
- 881
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Low-Latency High-Throughput Systolic Multipliers Over $GF(2^{m})$ for NIST Recommended PentanomialsXie, Jiafeng / Meher, Pramod Kumar / Mao, Zhi-Hong et al. | 2015
- 881
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Low-Latency High-Throughput Systolic Multipliers Over [Formula Omitted] for NIST Recommended PentanomialsJiafeng Xie et al. | 2015
- 891
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Synchronizing a Weighted and Weakly-Connected Kuramoto-Oscillator Digraph With a PacemakerLi, Xiang / Rao, Pengchun et al. | 2015
- 906
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Impedance-Based Local Stability Criterion for DC Distributed Power SystemsZhang, Xin / Ruan, Xinbo / Tse, Chi K. et al. | 2015
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IEEE Transactions on Circuits and Systems—I: Regular Papers publication information| 2015
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