An All-Digital Edge Racing True Random Number Generator Robust Against PVT Variations (English)
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- New search for: Yang, Kaiyuan
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In:
IEEE journal of solid state circuits
;
51
, 4
; 1022-1031
;
2016
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ISSN:
- Article (Journal) / Print
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Title:An All-Digital Edge Racing True Random Number Generator Robust Against PVT Variations
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Contributors:
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Published in:IEEE journal of solid state circuits ; 51, 4 ; 1022-1031
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Publisher:
- New search for: IEEE
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Place of publication:New York, NY
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Publication date:2016
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ISSN:
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ZDBID:
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DOI:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
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Table of contents – Volume 51, Issue 4
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 785
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Table of Contents| 2016
- 787
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Introduction to the Special Issue on the 2015 Symposium on VLSI CircuitsMotomura, Masato et al. | 2016
- 789
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Ultra Low-Energy Relaxation Oscillator With 230 fJ/cycle EfficiencyNadeau, Phillip M et al. | 2016
- 800
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A ${\pm }\text{5}$ A Integrated Current-Sensing System With ${\pm}\text{0.3} $% Gain Error and 16 μA Offset From $-\text{55}^{\;\circ} \text{C}$ to $+ \text{85}^{\;\circ} \text{C}$Shalmany, S. H. / Draxelmayr, D. / Makinwa, K. A. et al. | 2016
- 800
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A \text A Integrated Current-Sensing System With \text % Gain Error and 16 μA Offset From -\text^ \text to + \text^ \textShalmany, Saleh Heidary et al. | 2016
- 800
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A [Formula Omitted] A Integrated Current-Sensing System With [Formula Omitted]% Gain Error and 16 [mu]A Offset From [Formula Omitted] to [Formula Omitted]Saleh Heidary Shalmany et al. | 2016
- 809
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A High Data-Rate Energy-Efficient Triple-Channel UWB-Based Cognitive RadioKim, Nam-Seog et al. | 2016
- 821
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A Bang Bang Phase-Locked Loop Using Automatic Loop Gain Control and Loop Latency Reduction TechniquesKuan, Ting-Kuei et al. | 2016
- 832
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A 1.3 mW 48 MHz 4 Channel MIMO Baseband Receiver With 65 dB Harmonic Rejection and 48.5 dB Spatial Signal SeparationKim, Chul et al. | 2016
- 845
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A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable ReceiverWu, Jiangfeng et al. | 2016
- 860
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A 10/20/30/40 MHz Feedforward FIR DAC Continuous-Time \Delta\Sigma ADC With Robust Blocker Performance for Radio ReceiversLoeda, Sebastian et al. | 2016
- 860
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A 10/20/30/40 MHz Feedforward FIR DAC Continuous-Time [Formula Omitted] ADC With Robust Blocker Performance for Radio ReceiversSebastian Loeda et al. | 2016
- 871
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Design Techniques for a 60 Gb/s 173 mW Wireline Receiver Frontend in 65 nm CMOS TechnologyHan, Jaeduk et al. | 2016
- 881
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A 3.8 mW/Gbps Quad-Channel 8.5-13 Gbps Serial Link With a 5 Tap DFE and a 4 Tap Transmit FFE in 28 nm CMOSKocaman, Namik et al. | 2016
- 893
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A 45 nm CMOS-SOI Monolithic Photonics Platform With Bit-Statistics-Based Resonant Microring Thermal TuningSun, Chen et al. | 2016
- 908
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A 3-10 fJ/conv-step Error-Shaping Alias-Free Continuous-Time ADCPatil, Sharvil et al. | 2016
- 919
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A Low Ripple Switched-Capacitor Voltage Regulator Using Flying Capacitance DitheringBang, Suyoung et al. | 2016
- 930
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A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOIZimmer, Brian et al. | 2016
- 943
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A 10 nW-1 \upmu } Power Management IC With Integrated Battery Management and Self-Startup for Energy Harvesting ApplicationsEl-Damak, Dina et al. | 2016
- 955
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A Bidirectional Neural Interface Circuit With Active Stimulation Artifact Cancellation and Cross-Channel Common-Mode Noise SuppressionMendrela, Adam E et al. | 2016
- 966
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A Hybrid AMOLED Driver IC for Real-Time TFT Nonuniformity CompensationBang, Jun-Suk et al. | 2016
- 979
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Large-Area Microphone Array for Audio Source Separation Based on a Hybrid Architecture Exploiting Thin-Film Electronics and CMOSSanz-Robinson, Josue et al. | 2016
- 992
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A \mathbf\; \text\ \mathbf\;\text Hybrid NRZ/Multi-Tone I/O With Crosstalk and ISI Reduction for Dense InterconnectsGharibdoust, Kiarash et al. | 2016
- 992
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A [Formula Omitted] Hybrid NRZ/Multi-Tone I/O With Crosstalk and ISI Reduction for Dense InterconnectsKiarash Gharibdoust et al. | 2016
- 992
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A $\mathbf{4\times 9}\; \text{Gb/s}\ \mathbf{1}\;\text{pJ/b}$ Hybrid NRZ/Multi-Tone I/O With Crosstalk and ISI Reduction for Dense InterconnectsGharibdoust, K. / Tajalli, A. / Leblebici, Y. et al. | 2016
- 1003
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A High-Density Metal-Fuse Technology Featuring a 1.6 V Programmable Low-Voltage Bit Cell With Integrated 1 V Charge Pumps in 22 nm Tri-Gate CMOSKulkarni, Sarvesh H et al. | 2016
- 1009
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A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-MemoryJeloka, Supreet et al. | 2016
- 1022
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An All-Digital Edge Racing True Random Number Generator Robust Against PVT VariationsYang, Kaiyuan et al. | 2016
- 1032
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A 0.5° Error 10 mW CMOS Image Sensor-Based Gaze Estimation ProcessorBong, Kyeongryeol et al. | 2016
- 1041
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An Inductively Powered Wireless Solid-State Drive System With Merged Error Correction of High-Speed Wireless Data Links and NAND Flash MemoriesKosuge, Atsutake et al. | 2016
- 1051
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High-level Video Analytics PC Subsystem Using SoC With Heterogeneous Multicore ArchitectureSasagawa, Yukihiro et al. | 2016
- 1060
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Introducing IEEE Collabratec| 2016
- C1
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Front Cover| 2016
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Information For Authors| 2016
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IEEE JOURNAL OF SOLID-STATE CIRCUITS| 2016