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We herewith present an automatic synthesis tool which consists of two main components, the DSL-compiler and the DSL-synthesizer. The DSL-compiler transforms a behavioural level specification written in DSL (Digital System Specification Languages) into a data path graph. The synthesizer generates an interconnection list of hardware modules, currently consisting of CMOS standard cells. An interface to an automatic placement and routing system is provided, so the full design process is automated. Further specification errors are avoided by compile-time checks of semantic conditions.