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Various methodologies from gate array to full custom, are available for designing Application Specific Integrated Circuits (ASIC's). We describe the advantages and drawbacks of these various methodologies, with emphasis on a relatively new but proven methodology, silicon compilation. With a concrete design example, we compare this methodology against the traditional methodologies, namely gate arrays and standard cells, with respect to various cost factors. Silicon compilation is an attractive, cost-effective solution for many applications, particularly when used in combination with other methodologies. Silicon compilation is flexible and ease to use, and it results in an efficient design. We also discuss thefuture directions of silicon compilation.