Modeling the effects of patterning error on MOSFET (English)
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In:
ICSICT, International Conference on Solid-State and Integrated Circuits Technology, 7
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1049-1052
;
2005
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ISBN:
- Conference paper / Print
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Title:Modeling the effects of patterning error on MOSFET
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Contributors:
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Published in:
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Publisher:
- New search for: IEEE Operations Center
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Place of publication:Piscataway
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Publication date:2005
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Size:4 Seiten, 5 Quellen
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ISBN:
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DOI:
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Type of media:Conference paper
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Type of material:Print
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Language:English
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Keywords:
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Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
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2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings - Cover| 2004
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Front Inside Cover [blank]| 2004
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2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings - Title| 2004
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Copyright| 2004
- 0_6
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Conference Organizations| 2004
- 0_10
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Welcome address [ICSICT 2004]Yangyuan Wang, / Tak Ning, / Iwai, H. et al. | 2004
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Session Index| 2004
- 0_12
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Breaker page| 2004
- 0_13
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Back Inside Cover [blank]| 2004
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ISBN 0-7803-8511-X [Back Cover]| 2004
- 1
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Taking silicon to the limit: challenges and opportunitiesTsu-Jae King, et al. | 2004
- 1
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Author index| 2004
- 1
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Contents| 2004
- 6
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Progress and prospects of semiconductor Ss for nanoelectronicsArakawa, Y. et al. | 2004
- 12
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Silicon-based RF ICs up to 100 GHz: research trends and applicationsSimburger, W. / Aufinger, K. / Bock, J. / Boguth, S. / Kehrer, D. / Kienmayer, C. / Knapp, H. / Meister, T.F. / Perndl, W. / Rest, M. et al. | 2004
- 20
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Challenges and key potential technological innovations for scaling MOSFETS through the end of the roadmapZeitzoff, P.M. et al. | 2004
- 26
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Advanced CMOS transistors in the nanotechnology era for high-performance, low-power logic applicationsChau, R. / Doczy, M. / Doyle, B. / Datta, S. / Dewey, G. / Kavalieros, J. / Jin, B. / Metz, M. / Majumdar, A. / Radosavljevic, M. et al. | 2004
- 31
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Scaling beyond conventional CMOS deviceMeikei Ieong, / Dons, B. / Kedzierski, J. / Zhibin Ren, / Ken Rim, / Min Yang, / Huiling Shang, et al. | 2004
- 35
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3-dimensional nano-CMOS transistors to overcome scaling limitsDonggun Park, / Kinam Kim, / Byung-Il Ryu, et al. | 2004
- 41
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Extremely scaled planar bulk CMOS: challenges and optionsShaofeng Yu, et al. | 2004
- 47
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High performance 27 nm gate length CMOS device with EOT 1.4 nm gate oxynitride and strained technologyIuxia Xu, / He Ian, / Ming Liu, / Zhengsheng Man, / Baoqing Chen, / Huaxiang Yin, / Gang Lin, / Yajiang Zhu, / Tianchun Ye, / Denxin Wu, et al. | 2004
- 53
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Schottky s/d MOSFETs with high-K gate dielectrics and metal gate electrodesShiyang Zhu, / Jingde Chen, / Yu, H.Y. / Whang, S.J. / Chen, J.H. / Shen, C. / Li, M.F. / Lee, S.J. / Chunxiang Zhu, / Chan, D.S.H. et al. | 2004
- 57
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Impact of metal gate work function on nano CMOS device performanceHou, Y.T. / Low, T. / Bin Xu, / Ming-Fu Li, / Samudra, G. / Kwong, D.L. et al. | 2004
- 61
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Optimized deep-submicron MOS transistor for low power applicationJianhua Jiu, / Xinfu Liu, / Lee, S. / Boyong He, / Xing Yu, et al. | 2004
- 65
-
Scaling capability of GOI and SOI devicesXia An, / Yi Wang, / Ru Huang, / Xing Zhang, / Yangyuan Wang, et al. | 2004
- 69
-
Novel Schottky barrier MOSFET with dual-layer silicide source/drain structureDingyu Li, / Lei Sun, / Zhiliang Xia, / Shengdong Zhang, / Xiaoyan Liu, / Jinfeng Kang, / Ruqi Han, et al. | 2004
- 73
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Effect of nitrogen on the off-state drain leakage currentJiayi Huang, / Chen, T.P. / Tse, M.S. / Ang, C.H. / Manju, S. et al. | 2004
- 77
-
Measurement of source coupled logic "exclusive OR" circuit ring oscillator of SOI Si vertical dual carrier field effect transistor with effective channel length of 5-30nmTang, Z.M. / Li, G.H. / Yang, R. / Xu, Y.Z. / Yang, Y.H. / Huang, D.H. / Xu, P. / Shen, S.G. / Lin, C.L. / Yan, F.Z. et al. | 2004
- 81
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Three-dimensional stacked-Fin-CMOS integrated circuit using double layer SOI materialChan, P.C.H. / Xusheng Wu, / Chuguang Feng, / Mansun Chan, / Shengdong Zhang, et al. | 2004
- 86
-
Device physics and integrated device and circuit simulation of carrier field effect transistor with effective channel length of 5-30 nm and its integrated circuits in system-on-a-chipHuang, C. / Yang, Y.H. / Huang, D.H. et al. | 2004
- 90
-
CMOS transistor design challenges for mobile and digital consumer applicationsWu, J. et al. | 2004
- 96
-
Multi-gate CMOS with fin-channel structures beyond planar CMOS scaling limitsHisamoto, D. et al. | 2004
- 100
-
Emerging double-gate FinFETs technologyYongxun Liu, / Masahara, M. / Ishii, K. / Suzuki, E. et al. | 2004
- 106
-
Unique capacitance phenomenon of a 100nm double-gate FD SOI NMOS device with n/sup +//p/sup +/ poly top/bottom gateYang, C.P. / Hsu, C.H. / Kuo, J.B. et al. | 2004
- 110
-
Investigation of gate oxide quality in novel nanometer vertical MOSFETs by fillet local oxidationYi Tong, et al. | 2004
- 113
-
A novel asymmetric graded low doped drain (AGLDD) vertical channel nMOSFET with sidewall masked (SWAM) LOCOS isolationFalong Zhou, / Ru Huang, / Xing Zhang, / Yangyuan Wang, et al. | 2004
- 117
-
Multi-gate SOI MOSFET for 3D IC fabricationJyi-Tsong Lin, / Jian-Han Huang, et al. | 2004
- 122
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Spacer design between source/drain and gate for high-performance FinFET devicesGang Chen, / Ru Huang, / Xing Zhang, / Li Yang, / Dongyan Zhao, / Yangyuan Wang, et al. | 2004
- 126
-
Study on 0.1 micron grooved-gate CMOSXiao-Ju Zhang, / Xiao-Hua Ma, / Hong-Xia Ren, / Yue Hao, / Bao-Gang Sun, et al. | 2004
- 130
-
Process and characteristic of vertical multi-gate MOSFETs with graded channel dopingFang Yuan, / Li Wei Hua, / Yin Gang Yi, et al. | 2004
- 134
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Corner effects in vertical MOSFETsXiaoyu Hou, / Falong Zhou, / Ru Huang, / Xing Zhang, et al. | 2004
- 138
-
Random dopant induced threshold voltage fluctuations in double gate MOSFETsLing Xia, / Xuewen Can, et al. | 2004
- 142
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Extraction and applications of on-chip interconnect inductanceSimon Wong, S. / So-Young Kim, / Yue, C.P. / Chang, R. / O'Mahony, F. et al. | 2004
- 147
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Impact of scaling on analog/RF CMOS performanceMercha, A. / Jeamsaksiri, W. / Ramos, J. / Jenei, S. / Decoutere, S. / Linten, D. / Wambacq, P. et al. | 2004
- 153
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Analog performance of scaled bulk and SOI MOSFETsSuryagandh, S.S. / Garg, M. / Gupta, M. / Woo, J.C.S. et al. | 2004
- 159
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RF CMOS gate resistance and noise characterizationJiang Tao, / Rezvani, A. / Findley, P. et al. | 2004
- 163
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Characterization and modeling of waffle MOSFETs for high frequency applicationsWen Wu, / Sang Lam, / Ko, P.K. / Mansun Chan, et al. | 2004
- 167
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On the importance of gate shot noise in deep submicron RF NMOSFETs induced by gate oxide breakdownWang, H. / Zeng, R. / Li, X.P. et al. | 2004
- 171
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Automated on-wafer measurement of noise figure and base spreading resistanceConnor, S.D. / Harrington, S.J. / Manson, A.J. / Nigrin, S. / Thomas, S. / Wilson, M.C. et al. | 2004
- 175
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Fabrication and integration of high performance mixed signal and RF passive components in 0.13/spl mu/m Cu BEOL technologiesChen, Z. / Lin, K.M. / Kuo, C.C. / Ko, T.C. / Huang, J.C. / Wang, J.P. / Lin, Y.F. / Wu, T.W. / Su, T.C. / Liao, C.C. et al. | 2004
- 179
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A novel silicon-based CBCPW-fed CBCPS ring resonatorKaixue Ma, / Jianguo Ma, / Manh Anh Do, / Kiat Seng Yeo, / Jianbo Sun, / Jianmin Miao, et al. | 2004
- 183
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Design and characterization of SOI spiral coil RF monolithic transformersGuoyan Zhang, / Dongyan Zhao, / Tao Yan, / Jinhua Liu, / Ruifeng Song, / Li Yang, / Yangyuan Wang, et al. | 2004
- 186
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SOI active and passive integrated devices for RFIC applicationsRong Yang, / Junfeng Li, / He Qian, / Zhengsheng Han, et al. | 2004
- 190
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Analysis of characteristic functions for equivalent circuit model in spiral inductorsHuang, F.Y. / Jiang, N. / Xie, L. / Lu, J.X. / Wu, W.G. et al. | 2004
- 194
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Analysis of self-resonant frequency for differential-driven symmetric and single-ended inductorsHongyan Jian, / Zhangwen Tang, / Jie He, / Hao Min, et al. | 2004
- 198
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Capacitance-voltage characterization for MOS capacitor on p-type high-resistivity silicon substrateRong, B. et al. | 2004
- 202
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Fabrication and characterization of 1.5fF//spl mu/m/sup 2/ high-performance low-cost metal-insulator-metal capacitor in 0.13/spl mu/m and below Cu BEOL technologiesChen, Z. / Lin, K.M. / Kuo, C.C. / Lin, Y.F. / Huang, J.C. / Su, T.C. / Wang, J.P. / Liao, C.C. / Han, Q.H. / Bei, D.H. et al. | 2004
- 206
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Wide tuning-range MOS varactors based on SOITao Yan, / Guoyan Zhang, / Hao Shi, / Ru Huang, / Xing Zhang, et al. | 2004
- 209
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Design of radio frequency metal-insulator-metal (MIM) capacitorsGoh, M.W.C. / Lim, Q. / Keating, R.A. / Kordesch, A.V. / Bin Mohd Yusof, Y. et al. | 2004
- 213
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A modified double-/spl pi/ equivalent circuit model for silicon-based planar spiral inductors and its application to a RF mixerLuo Lan, / Zeng Shan, / Li Ming, / Lu Sheng-li, / Shi Long-xing, et al. | 2004
- 217
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Passive-assured rational function approach for compact modeling of on-chip passive componentsZuochang Ye, / Zhiping Yu, et al. | 2004
- 221
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Optimization of on-chip inductor and its application in low-pass filterYun Liu, / Yong Wang, / Yanling Shir, / Ling Jiang, / Shoumian Chen, / Yuhang Zhao, / Xiaojin Li, et al. | 2004
- 224
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Modeling and parameters extraction of spiral inductors for silicon-based RFICsLingling Sun, / Jincai Wen, / Jinxing Yan, / Jiang Hu, et al. | 2004
- 228
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Heterogeneous integration of nano devices on Si CMOS platformWang, K.L. / Fei Liu, / Ostroumov, R. et al. | 2004
- 234
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Functional scaling beyond ultimate CMOSHutchby, J.A. / Zhirnov, V.V. / Cavin, R.K. / Bourianoff, G.I. et al. | 2004
- 240
-
CMOS nanoelectronics devices for the end of the roadmap and beyondDeleonibus, S. et al. | 2004
- 247
-
Ballistic transistors entrance to nanoscale electronicsNatori, K. et al. | 2004
- 251
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A discussion on the extension of Moore's LawTiefu Li, / Zhijian Li, et al. | 2004
- 255
-
The status, limits and countermeasures in the development of the silicon microelectronics industryZhongli Liu, et al. | 2004
- 258
-
Current status and future perspectives of wafer bonding (Smart Cut/spl trade/) SOI technologyYoshimi, M. / Mazure, C. et al. | 2004
- 262
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SOI CMOS: smaller-size devices, larger-size futureCristoloveanu, S. et al. | 2004
- 265
-
Single-crystalline silicon thin-film transistor on glassXuejie Shi, / Man Wong, / Henttinen, K. / Suni, T. / Suni, I. / Lau, S.S. et al. | 2004
- 269
-
A novel technique of silicon-on-nothing MOSFETs fabrication by hydrogen and helium co-implantationWeihai Bu, / Ru Huang, / Ming Li, / Yu Tian, / Yangyuan Wang, et al. | 2004
- 273
-
Fully-depleted SOI CMOS devices with W/TiN gateJun Lian, / Chaohe Hai, et al. | 2004
- 277
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Effect of the implantation of fluorine on the mobility of channel electron for partially depleted SOI nMOSFETZhong-Shan Zheng, / Zhong-Li Liu, / Guo-Qiang Zhang, / Ning Li, / Kai Fan, / Qing Lin, / Zheng-Xuan Zhang, / Cheng-Lu Lin, et al. | 2004
- 279
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Experimental investigation of the annealing process for self-aligned DSOI MOSFETWang Jian, / Lv Zhichao, / Lin Xi, / Dong Yemin, / Tian Lilin, et al. | 2004
- 283
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Design considerations of ultra-thin body SOI MOSFETsYu Tiar, / Ru Huang, et al. | 2004
- 287
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Fully-depleted SOI devices with elevated source/drain structureJun Lian, / Chaohe Hai, et al. | 2004
- 291
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Scalability and parasitic effect of UTB SOI MOSFETs with raised S/D and sunk S/DWei Ke, / Shengdong Zhang, / Xiaoyan Liu, / Ruqi Han, et al. | 2004
- 295
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Design guidelines of nano-scaled SOI-DTMOS deviceGuoliang Chen, / Ru Huang, et al. | 2004
- 299
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Abnormal off-state leakage current increasing with reduced silicon body thickness in nano-SOI devicesWenping Wang, / Ru Huang, / Guoyan Zhang, / Shengqi Yang, / Yangyuan Wang, et al. | 2004
- 302
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High performance metal-gate/high-/spl kappa/ MOSFETs and GaAs compatible RF passive devices on Ge-on-insulator technologyChin, A. / Kao, H.L. / Yu, D.S. / Liao, C.C. / Zhu, C. / Li, M.F. / Shiyang Zhu, / Dim-Lee Kwong, et al. | 2004
- 306
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Fabrication, device design and mobility enhancement of germanium channel MOSFETsShang, H. / Gousev, M. / Gribelyuk, M. / Chu, J.O. / Mooney, P.M. / Wang, X. / Guarini, K.W. / Ieong, M. et al. | 2004
- 310
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Strain engineering for hole mobility enhancement in p-channel field-effect transistorsYee-Chia Yeo, et al. | 2004
- 315
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Universality of electron mobility in Ge MOSFETs investigated by Monte Carlo simulationZhiliang Xia, / Gang Du, / Xiaoyan Liu, / Jinfeng Kang, / Ruqi Han, et al. | 2004
- 319
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CMOS shallow trench isolation x-stress effect on channel width for 0.18/spl mu/m technologyTan, P.B.Y. / Kordesch, A.V. / Sidek, O. et al. | 2004
- 321
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Characteristics of 25nm MOSFETs with mechanical strain in the channelTao Wiu, / Xiaoyan Liu, / Gang Du, / Jingfeng Kang, / Ruqi Han, et al. | 2004
- 325
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Fabrication of strained Si channel PMOSFET on thin relaxed Si/sub 1-x/Ge/sub x/ virtual substrateMei Ding-lei, / Yang Mo-hua, / Li Jing-chun, / Yu Qi, / Zhang Jing, / Xu Wan-jing, / Tan Kai-zhou, et al. | 2004
- 328
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A new 2D analytical model of double RESURF in SOI high voltage devicesZhaoji Li, / Yufeng Guo, / Bo Zhang, / Jian Fang, / Zehong Li, et al. | 2004
- 332
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Design, fabrication and characterization of a bi-directional insulated gate bipolar transistorShanqi Zhao, / Sin, J.K.O. / Chuguang Feng, et al. | 2004
- 336
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Integrated power transistor application of three-dimensional sidewall-channel MOS transistorSunami, H. / Kobnvashi, K. / Matsumura, S. et al. | 2004
- 340
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Novel SiC-trench-MOSFET with reduced oxide electric fieldHajjiah, A.T. / Huang, A.Q. et al. | 2004
- 345
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Characterization and modeling of a step-gate-oxide MOSFET for RF power amplifiersShuo Jia, / Tsui, K.K.P. / Xiaoping Liao, / Chen, K.J. et al. | 2004
- 349
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A novel double RESURF LDMOS with multiple rings in non-uniform drift regionJie Wu, / Jian Fang, / Bo Zhang, / Zhaoji Li, et al. | 2004
- 353
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Analysis on the surface electrical field of high voltage bulk-silicon LEDMOS with multiple field platesWeifeng Sun, / Yangbo Yi, / Shengli Lu, / Longxing Shi, et al. | 2004
- 357
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An analytical breakdown model of high voltage SOI device considering the modulation of step buried-oxide interface chargesYufeng Guo, / Zhaoji Li, / Bo Zhang, / Jian Fang, et al. | 2004
- 361
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Electrical characterization of high-k gate dielectricsMa, T.P. et al. | 2004
- 366
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Selected topics on HfO2 gate dielectrics for future ULSI CMOS devicesLi, M.F. / Yu, H.Y. / Hou, Y.T. / Kang, J.F. / Wang, X.P. / Shen, C. / Ren, C. / Yeo, Y.C. / Zhu, C.X. / Chan, D.S.H. et al. | 2005
- 366
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Selected topics on HfO/sub 2/ gate dielectrics for future ULSI CMOS devicesLi, M.F. / Yu, H.Y. / Hou, Y.T. / Kang, J.F. / Wang, X.P. / Shen, C. / Ren, C. / Yeo, Y.C. / Zhu, C.X. / Chan, D.S.H. et al. | 2004
- 372
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Process techniques and electrical characterization for high-k (HfO/sub x/N/sub y/) gate dielectric in MOS devicesKuei-Shu Chang-Liao, / Chun-Yuan Lu, / Chin-Lung Cheng, / Tien-Ko Wang, et al. | 2004
- 378
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Material and interface instabilities of hafnium gate oxideHei Wong, et al. | 2004
- 384
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Electronic behavior of high K oxidesRobertson, J. et al. | 2004
- 388
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Room temperature plasma oxidation (RTPO): a new approach to obtain ultrathin layers of SiO2 and high K dielectricsEstrada, M. / Tinoco, J.C. / Cerdeira, A. et al. | 2005
- 388
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Room temperature plasma oxidation (RTPO): a new approach to obtain ultrathin layers of SiO/sub 2/ and high K dielectricsEstrada, M. / Tinoco, J.C. / Cerdeira, A. et al. | 2004
- 393
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Characteristics of sub-1 nm CVD HfO/sub 2/ gate dielectrics with HfN electrodes for advanced CMOS applicationsKang, J.F. / Yu, H.Y. / Ren, C. / Wang, X.P. / Li, M.F. / Chan, D.S.H. / Liu, X.Y. / Han, R.Q. / Wang, Y.Y. / Kwong, D.L. et al. | 2004
- 399
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Reaction of interfacial layer and trapping in HfO/sub 2/ gated MOS structuresYanxiang Liu, / Wang, X.W. / Ma, T.P. / Lee, L.-S. / Ming-Jinn Tsai, / Yu-Wei Chou, et al. | 2004
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A comparison study of high-density MIM capacitors with ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminated, sandwiched and stacked dielectricsShi-Jin Ding, / Hu, H. / Chunxiang Zhu, / Kim, S.J. / Li, M.F. / Cho, B.J. / Chin, A. / Kwong, D.L. et al. | 2004
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Effective minimization of charge trapping in high-k gate dielectrics with an ultra-short pulse techniqueZhao, Y. / Young, C.D. / Pendley, M. / Matthews, K. / Byoung Hun Lee, / Brown, G.A. et al. | 2004
- 411
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In-line control of nitrogen implanted silicon for advanced multi-gate oxide applicationWang, T. / Chang, C.-I. / Wang, J.S. / Cheng, T. / Wu, N.-C. / Chen, J. / Wang, S.-F. et al. | 2004
- 415
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Study of nitridation plasma for ultra-thin gate dielectrics of 65 nm technology node and beyondWu, H. / Goo, D. / Mo, M. / Zhou, N. / Chen, J. / Zhu, B. / Ning, J. / Bonfanti, P. / Kuo, J. / Ming Li, et al. | 2004
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Effect of post-annealing on the physical and electrical properties of LaAlO/sub 3/ gate dielectricsLu, X.B. / Zhang, X. / Huang, R. / Lu, H.B. / Chen, Z.H. / Zhou, H.W. / Wang, X.P. / Nguyen, B.Y. / Wang, C.Z. et al. | 2004
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Plasma dopingMizuno, B. / Sasaki, Y. / Jin, C.-G. / Tamura, H. / Okashita, K. / Ito, H. / Tsutsui, K. / Iwai, H. et al. | 2004
- 428
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Junction formation in advanced planar and vertical devicesGossmann, H.-J. / Agarwal, A. et al. | 2004
- 434
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Low energy implantation technology with molecular ion beamTanjyo, M. / Hamamoto, N. / Umisedo, S. / Nagayama, T. / Sakai, S. / Naito, M. / Nagai, N. / Aoyama, T. / Nara, Y. et al. | 2004
- 439
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Effects of substrate surface conditions on dose controllability of plasma doping processTsutsui, K. / Higaki, R. / Sato, T. / Sasaki, Y. / Tamura, H. / Mizuno, B. / Iwai, H. et al. | 2004
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Texture of silicide films on Si(001): the occurrence of axiotaxy in cubic CoSi/sub 2/, tetragonal /spl alpha/-FeSi/sub 2/ and orthorhombic NiSiDetavernier, C. / Lavoic, C. et al. | 2004
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Texture of silicide films on Si(001): the occurrence of axiotaxy in cubic CoSi2, tetragonal alpha -FeSi2 and orthorhombic NiSiDetavernier, C. / Lavoic, C. et al. | 2005
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Annealing process influence and dopant-silicide interaction in self-aligned NiSi technologyGuo-Ping Ru, / Yu-Long Jiang, / Xin-Ping Qu, / Bing-Zong Li, et al. | 2004
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Tuning of silicide Schottky barrier heights by segregation of sulfur atomsZhao, Q.T. / Rije, E. / Breuer, U. / Lenk, S. / Mantl, S. et al. | 2004
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The characteristics of Ni (Pt) Si/Si Schottky barrier diode with deep trenchZhang Li-Chun, / Jin Hai-Yan, / Gao Yu-Zhi, / Zhang Hui, / Huang Wei, / Lu Jian-Zheng, et al. | 2004
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Ni silicide and Ni germanosilicide self-aligned process for 65nm and beyond CMOS technology by 2-step rapid thermal annealingHongxiang Mo, / Bonfanti, P. / Bei Zhu, / Gao, D. / Hanming Wu, / Chen, J. / Hui-Zhen Wu, / Yu-Long Jiang, / Guo-Ping Ru, / Chen, F. et al. | 2004
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A novel NiSi selective wet etch on Si and on SiGeBonfanti, P. / Hongxiang Mo, / Bei Zhu, / Gao, D. / Hanming Wu, / Chen, J. / Hui-Zhen Wu, / Yu-Long Jiang, / Guo-Ping Ru, et al. | 2004
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Fabrication and characteristics of Ti- and Ni-germanide Schottky contacts on n-Ge (100) substratesDedong Han, / Xin Wang, / Yi Wang, / Dayu Tian, / Wei Wang, / Xiaoyan Liu, / Jinfeng Kang, / Ruqi Han, et al. | 2004
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Atomic layer deposition: a film technology for the nano device eraSeidel, T.E. et al. | 2004
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Structure evolution in ULSI interconnects toward 65nm/45nm-nodes ASICsHayashi, Y. et al. | 2004
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Advanced Cu barrier/seed development for 65nm technology and beyondPeijun Ding, / Gopalraja, P. / Jiaruming Fu, / Jick Yu, / Zheng Xu, / Fusen Chen, et al. | 2004
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Integration and reliability of a manufacturable 130nm dual damascene Cu/low-k processLee, T.J. / Lim, Y.K. / Zhang, F. / Tan, D. / Siew, Y.K. / Perera, C. / Bu, X.M. / Chong, D. / Vigar, D. / Sun, S.C. et al. | 2004
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A scalable low-k/Cu interconnect technology using self-assembled ultra-low-k porous silica filmsKikkawa, T. / Oku, Y. / Kohmura, K. / Fujii, N. / Tanaka, H. / Goto, T. / Ishikawa, A. / Matsuo, H. / Miyoshi, H. / Nakano, A. et al. | 2004
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Design and control of critical properties of low-k dielectrics for nanoscale interconnectsZhou, H. / Shi, F.G. / Zhao, B. et al. | 2004
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Key attributes and solutions of CMP process for advanced Cu damascene interconnectsShumin Wang, et al. | 2004
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Particle innovations in copper CMP slurry development - impact of hydrophilicity, hardness, and functionalityYuzhuo Li, et al. | 2004
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Low resistivity copper interconnection layersHara, T. / Namiki, K. / Shimura, Y. et al. | 2004
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Reactively sputtered vanadium nitride as diffusion barrier for copper interconnectXin-Ping Qu, / Mi Zhou, / Guo-Ping Ru, / Bing-Zong Li, et al. | 2004
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Temperature rise in low-k ULSI interconnectsJia Zhou, / Gang Ruan, / Xia Xiao, / Yiping Huang, / Lee, H.-D. et al. | 2004
- 528
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Young's modulus characterization for the fragile low-k film by the improved surface acoustic waves techniqueXia Xiao, / Hata, N. / Suying Yao, / Kikkawa, T. et al. | 2004
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Plasma and ion beam process-induced damage in semiconductors: review and retrospectiveAshok, S. et al. | 2004
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CD uniformity improvement and IC process monitoring by wireless sensor technologyShi-Qing Wang, / MacDonald, P. / Kruger, M. / Spanos, C. / Welch, M. et al. | 2004
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High-performance and damage-free neutral beam etching for advanced ULSI devicesSamukawa, S. et al. | 2004
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Scaling of shallow trench isolation with stress control for 65nm node and beyondKuroi, T. / Horita, K. et al. | 2004
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Lithography for sub<30 nm design rules: materials challengesNalamasu, O. / Ramanath, G. / Toh-Ming Lu, et al. | 2004
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Atomically controlled impurity doping for future Si-based devicesMurota, J. / Sakuraba, M. / Tillack, B. et al. | 2004
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Electron beam lithography and its application in fabricating nano-deviceLiu Ming, / Qiu yulin, / Chen-baoqin, / Xiu Qiuxia, / Zheng Yinkui, et al. | 2004
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Advanced in-line process control on sidewall striation of deep trench etchingHung-Wen Chiou, / Tso, S. / Tings Wang, et al. | 2004
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ECR-plasma equipment application for nanotechnologyShapoval, S. / Borodin, V. / Gorbunov, V. / Veretennikov, A. et al. | 2004
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Process development of negative tone dry film photoresist for MEMS applicationsShan Xue Chuan, / Jin Yufeng, / Lu Haijing, / Wong Chee Khuen, et al. | 2004
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Proximity effect in electron beam lithographyLiming Ren, / Baoqin Chen, et al. | 2004
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Single-wafer manufacturing technologies in 300-mm wafer fabIkeda, S. et al. | 2004
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Metrology standards for semiconductor manufacturingYu Guan, / Tortonese, M. et al. | 2004
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Lubrication behavior in chemical-mechanical planarizationLiang, H. / Xu, G. et al. | 2004
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Technology for three dimensional integrated system-on-a-chipKurino, H. / Koyanagi, M. et al. | 2004
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The effect of pretreatment process on electroless nickel bumping for different Al padsXiao-Chen Fu, / Guo-Wei Xiao, / Pui-Chung Law, / Ching Ho Chan, P. et al. | 2004
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A 3-D wafer level hermetical packaging for MEMSJin, Y.F. / Wei, J. / Qi, G.J. / Wang, Z.F. / Lim, P.C. / Wong, C.K. et al. | 2004
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Finite element stress analysis of an multi-chip package by Taguchi design of experiments for package component thicknessesBiao Liu, / Mingxiang Wang, / Tim Fai Lam, et al. | 2004
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Large scale assembly of carbon nanotube-based integrated circuit structures via "surface-programmed assembly" methodMinback Lee, / Jiwoon Im, / Sung Myung, / Seunghun Hong, et al. | 2004
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Intrinsic performance of carbon-nanotube transistorsNihey, F. / Hongo, H. / Ochiai, Y. / Yudasaka, M. / Iijima, S. et al. | 2004
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Silicon single-electron devices and their applicationsTakahashi, Y. / Ono, Y. / Fujiwara, A. / Inokawa, H. et al. | 2004
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Si multidot single-charge tunneling devicesTabe, M. / Nuryadi, R. / Ikeda, H. / Ishikawa, Y. et al. | 2004
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Single electron transistors: modeling and fabricationMorris, J.F. / Wu, F. / Radehaus, C. / Hietschold, M. / Henning, A. / Hofmann, K. / Kiesow, A. et al. | 2004
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Measuring electronic transport in a single carbon nanotube inside the SEMChen, Q. / Wang, S. / Liang, X.-L. / Gao, S. / Wang, M.S. / Peng, L.M. et al. | 2004
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Ambipolar field-effect transistors based on fullerene peapodsAo Guo, / Yunyi Fu, / Lunhui Guan, / Xiaofeng Wang, / Zujin Shi, / Zhennan Gu, / Xing Zhang, et al. | 2004
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High performance resonant tunneling diode on a new material structureWang Jianlin, / Liu Zhongli, / Wang Liangchen, / Zeng Yiping, / Yang Fuhua, / Bai Yunxia, et al. | 2004
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Observation of single electron tunneling effect in silicon-rich oxideZhenrui Yu, / Aceves, M. / Monfil, K. / Chavez, J.P. / Jinhui Du, et al. | 2004
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Can single electron effects be directly observed in Si quantum dots array at room temperature?Yu, L.W. / Chen, K.J. / Wu, L.C. / Dai, M. / Li, W. / Huang, X.F. et al. | 2004
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Field-effect transistors based on single-wall carbon nanotubes bundlesXiaofeng Wang, / Ao Guo, / Lunhui Guan, / Zujin Shi, / Zhennan Gu, / Yunyi Fu, / Xing Zhang, / Ru Huang, et al. | 2004
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The prospect on semiconductor memory in nano eraKinam Kim, / Gwanhyeob Koh, et al. | 2004
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Challenges of DRAM and flash scaling - potentials in advanced emerging memory devicesTran, L.C. et al. | 2004
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New innovations in non-volatile memory technologyLiu, R. et al. | 2004
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Nanoscale silicon-oxide-nitride-oxide-silicon (SONOS) structure and its applicationsByung-Gook Park, / Yong Kyu Lee, / Byung Yong Choi, / Dong Gun Park, et al. | 2004
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A new thin-film, cross-point non-volatile memory using threshold switching properties of phase-change chalcogenideYi-Chou Chen, / Chen, C.F. / Chen, S.H. / Chen, C.T. / Yu, J.Y. / Lung, S.L. / Liu, R. / Chih-Yuan Lu, et al. | 2004
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Multi-bit MONOS nonvolatile memory based on double-gate technologyChun Keung Chan, A. / Kam Hung Yuen, / Tsz Yin Man, / Mansun Chan, et al. | 2004
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Effects of CHE and CHISEL programming operation on the characteristics of SONOS memoryLei Sun, / Liyang Pan, / Ying Zeng, / Chen, J. / Huiqing Pang, / Xiyou Li, / Jun Zhu, et al. | 2004
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A novel reverse read array architecture for embedded SONOS type flash memoryWu Dong, / Pan Liyang, / Sun Lei, / Zhang Zhaojian, / Duan Zhigang, / Yang Guangjun, / Zhu Jun, et al. | 2004
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Optimal ramped-gate soft programming of over-erased flash EEPROM cells at given currentWu-yun Quan, / Chang-Ki Baek, / Kim, D.M. / Ruan Gang, / Yiping Huang, et al. | 2004
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A novel edge contact type cell for phase change RAM using N-doped GeSbTe filmsYun Ling, / Yinyin Lin, / Lianzhang Lai, / Baowei Iao, / Yunfeng Lai, / Jie Feng, / Ting ao Tang, / Bingchu Cai, / Bomy Chen, et al. | 2004
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A novel single poly EEPROM cell structure on thin oxide tunnel technologyTao Ren, / Liyang Pan, / Zhihong Liu, / Jun Zhu, et al. | 2004
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Meeting Si challenges: nano technology development in ChinaChen, J. / Gao, D. / Zhu, B. / Hongxiang Mo, / Hanming Wu, / Jay Ning, / Chen, S. / Sun, P. / Yang, S. et al. | 2004
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A triple gate oxide logic process for 90nm manufacturing technologyComing Chen, et al. | 2004
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Deep submicron embedded SRAM design issuesNatarajan, S. / Romanovsky, S. / Achyulhan, A. et al. | 2004
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A design based yield and redundancy model for high density dualport SRAM on 90nm technologyTao Peng, / Landry, G. / Iandolo, W. et al. | 2004
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Design and modeling of tapered LWL architecture for high density SRAMWong, R. / Tao Peng, / Landry, G. et al. | 2004
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Study on Pb(Zr, Ti)O3 capacitors for ferroelectric random access memoryJia, Ze / Zhang, Jiachuan / Xie, Dan / Zhang, Zhigang / Ren, Tianling / Liu, litian et al. | 2005
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Study on Pb(Zr, Ti)O/sub 3/ capacitors for ferroelectric random access memoryJia Ze, / Zhang Jiachuan, / Xie Dan, / Zhang Zhigang, / Ren Tianling, / Liu Litian, et al. | 2004
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A ferroelectric capacitor compact model for circuit simulationChao-gang Wei, / Tian-ling Ren, / Dan Xie, / Zhi-Gang Zhang, / Jun Zhu, / Li-Tian Liu, et al. | 2004
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Effects of integration processes on the ferroelectric performance of SrBi/sub 2/Ta/sub 2/O/sub 9/ capacitorsZhigang Zhang, / Jim Zhu, / Dan Xie, / Zhihong Liu, et al. | 2004
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High performance bipolar spin transistorLo, C.K. / Huang, Y.W. et al. | 2004
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Nanometer scale spintronic sensors and memoriesYuankai Zheng, / Kebin Li, / Guchang Han, / Zaibing Guo, / Yihong Wu, et al. | 2004
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A microscopic computer model of electrical conduction and joule heating in nanodevicesHorsfieid, A.P. / Bowler, D.R. / Fisher, A.J. / Todorov, T.N. / Sanchez, C. et al. | 2004
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Electronic states of InAs vertically-assembled quantum disks in magnetic fields and two-electron quantum-disk qubitQing-Rui Dong, / Zhi-Chuan Niu, et al. | 2004
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Influence of MTJ architecture on tunneling magnetoresistive effect for Al natural oxidation samplesBingjun Qu, / Huarui Liu, / Tianling Ren, / Keqing Ouyang, / Zengxu Fan, / Litian Liu, et al. | 2004
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Ferromagnetic tunnel junctions with high MR and low resistance-area productHuarui Liu, / Tianling Ren, / Binjun Qu, / Keqing Ouyang, / Zengxu Fan, / Litian Liu, et al. | 2004
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Structure optimization and thermal annealing effect of IrMn-based bottom spin valvesKe-Qing Ouyang, / Zeng-Xu Fan, / Tian-Ling Ren, / Li-Tian Liu, / Hua-Rui Liu, / Bing-Jun Qu, / Wei Li, et al. | 2004
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Conductivity to first SBD of a stress induced leakage path in ultrathin thermal oxidesMingzhen Xu, / Changhua Tan, / Yandong He, et al. | 2004
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A review of positive charge formation in gate oxidesZhang, J.F. / Zhao, C.Z. et al. | 2004
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A new approach to characterize and predict lifetime of deep-submicron nMOS devicesZhi Cui, / Liou, J.J. / Yun Yue, / Hei Wong, et al. | 2004
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Interface passivation by deuterium for nanoscale CMOS devicesKundu, T. / Misra, D. et al. | 2004
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On the design of tunable high-holding-voltage LVTSCR-based cells for on-chip ESD protectionSalcedo, J.A. / Liou, J.J. / Bernier, C. et al. | 2004
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Study on near-flatband-voltage SILC in ultra-thin plasma nitrided gate oxidesYandong He, / Mingzhen Zu, / Chuanghua Tan, et al. | 2004
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TDDB characteristics of ultra-thin HfN/HfO/sub 2/ gate stackHong Yang, / Ning Sa, / Liang Tang, / Xiaoyan Liu, / Jinfeng Kang, / Ruqi Han, / Yu, H.Y. / Ren, C. / Li, M.-F. / Chan, D.S.H. et al. | 2004
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TDDB characteristics of ultra-thin HfN/HfO2 gate stackYang, Hong / Sa, Ning / Tang, Liang / Liu, Xiaoyan / Kang, Jinfeng / Han, Ruqi / Yu, H.Y. / Ren, C. / Li, M.F. / Chan, D.S.H. et al. | 2005
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Hot carrier issues in thin body double-gate MOSFETMing Li, / Eun-Jung Yoon, / Chang-Woo Oh, / Sung-Young Lee, / Sung-Min Kim, / Kyeong-Hwan Yeo, / Min-Sang Kim, / Sung-Hwan Kim, / Dong-Uk Choi, / Jeong-Dong Choe, et al. | 2004
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RF reliability of MOSFETs subject to electrical stressChuanzhao Yu, / Yuan, J.S. et al. | 2004
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Active ESD shunt with transistor feedback to reduce latchup susceptibility or false triggeringTong, P.C.F. / Chen, W. / Ming Dou Ker, / Hui, J. / Ping Ping Xu, / Liu, P.Z.Q. et al. | 2004
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Mechanism of negative bias temperature instability for PMOSFET's with thin gate oxideHongxia Liu, / Yue Hao, et al. | 2004
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Interface trap generation on thin SiO/sub 2/ and plasma-nitrided SiO/sub 2/ gate dielectrics under static and dynamic stressesShiyang Zhu, / Nakajima, A. / Ohashi, T. / Miyake, H. et al. | 2004
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The statistical analysis of substrate current to soft breakdown in ultra-thin gate oxide n-MOSFETsYangang Wang, / Kai Shi, / Gaosheng Jia, / Mingzhen Xu, / Changhua Tan, / Xiaorong Duan, et al. | 2004
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An investigation of endurance characteristic using PDO method in FLOTOX EEPROM structuresBing Xie, / Yandong He, / Mingzhen Xu, / Changhua Tan, et al. | 2004
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A new observation of hot-carrier induced interface traps spatial distribution in 0.135 /spl mu/m n-MOSFET by gate-diode methodYao Zhao, / Mingzhen Xu, / Changhua Tan, et al. | 2004
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The board implementation for checking SEU test on memory devicesYoung Hwan Lho, / Ki Yup Kim, et al. | 2004
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Influence of fluorine on radiation-induced charge trapping in the SIMOX buried oxidesGuoqiang Zhang, / Zhongli Liu, / Ning Li, / Zhongshan Zhen, / Guohua Li, et al. | 2004
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Radiation response of partially-depleted MOS transistors fabricated in the fluorinated SIMOX wafersNing Li, / Guoqiang Zhang, / Zhongli Liu, / Kai Fan, / Zhongshan Zheng, et al. | 2004
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A design model of gate-coupling NMOS ESD protection circuitWang Yuan, / Jia Song, / Chen Zhongjian, / Zhang Ganggang, / Ji Lijiu, et al. | 2004
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Modeling of MEMS reliability in shock environmentsXu-Wen Fang, / Qing-An Huang, / Jie-Ying Tang, et al. | 2004
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Bottom-up silicon nanoelectronicsMizuta, H. / Khalafalla, M. / Durrani, Z.A.K. / Uno, S. / Koshida, N. / Tsuchiya, Y. / Oda, S. et al. | 2004
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Advances in Si-based nanotechnology and quantum devicesPeiyi Chen, / Ning Deng, / Lei Zhang, et al. | 2004
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Quantum-dot cellular automataSnider, G.L. / Orlov, A.O. / Kummamuru, R. / Timler, J. / Toth, G. / Bernstein, G.H. / Lent, C.S. et al. | 2004
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Silicon nanocrystal memoriesShi, Y. / Yang, H.G. / Lv, J. / Pu, L. / Zhang, R. / Shen, B. / Zheng, Y.D. et al. | 2004
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Metal nano-dot memory for high-density non-volatile memory applicationKoyanagi, M. / Takata, M. / Kurino, H. et al. | 2004
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Memory effect in Si nanocrystal embedded SiO2 filmsLiu, Y. / Chen, T.P. / Tse, M.S. / Ho, P.F. et al. | 2005
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Memory effect in Si nanocrystal embedded SiO/sub 2/ filmsLiu, Y. / Chen, T.P. / Tse, M.S. / Ho, P.F. et al. | 2004
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Spontaneous polarization induced growth of ZnO nanostructuresXiang Yang Kong, / Zhong Lin Wang, et al. | 2004
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Charging and Coulomb blockade effects in nanocrystalline Si dots embedded in SiO/sub 2/ matrixLiangcai Wu, / Kunji Chen, / Min Dai, / Linwei Yu, / Peigao Han, / Da Zhu, / Wei Li, / Xinfan Huang, et al. | 2004
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High-density Ge dots grown on Si substrate by modified S-K MethodBo Yan, / Yi Shi, / Lin Pu, / Jianming Zhu, / Pin Han, / Shulin Gu, / Bo Shen, / Youdou Zheng, et al. | 2004
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Preparation of InAs quantum dots on GaAs substrate by metal-organic vapor phase epitaxy using N/sub 2/ as carrier gasWang, H.H. / Ho, H.P. et al. | 2004
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Preparation of InAs quantum dots on GaAs substrate by metal-organic vapor phase epitaxy using N2 as carrier gasWang, H.H. / Ho, H.P. et al. | 2005
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Composition of nanometer-scaled self-assembled SiGe islandsNing Deng, / Lei Zhang, / Peiyi Chen, et al. | 2004
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A novel approach to evaluate the carrier effective mass in GeSi quantum dot structureZheng Yang, / Yi Shi, / Jian-Lin Liu, / Bo Yan, / Rong Zhang, / You-Dou Zheng, / Kang-Long Wang, et al. | 2004
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Recent progress in MOS compact modelingZhiping Yu, / Lilin Tian, et al. | 2004
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BSIM5 MOSFET ModelXuemei Jane Xi, / Jin He, / Mohan Dunga, / Hui Wan, / Mansun Chan, / Chung-Hsun Lin, / Babak Heydari, / Niknejad, A.M. / Chenming Hu, et al. | 2004
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Xsim: unified regional approach to compact modeling for next generation CMOSXing Zhou, / Siau Ben Chiah, / Karthik Chandrasekaran, / Wangzuo Shangguan, / Guan Huei See, et al. | 2004
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Compact modeling for drain current of short-channel MOSFETs including source/drain resistance effectHo, C.S. / Liou, J.J. / Lo, H.L. / Chang, Y.H. / Chang, C. / Yu, K. et al. | 2004
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Extracting the model parameters of non-ideal junctions based on explicit analytical solutions of I-V characteristicsOrtiz-Conde, A. / Garcia Sanchez, F.J. / Liou, J.J. et al. | 2004
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Physics-based exact analytical drain current equation and optimized compact model for long channel MOS transistorsJie, B.B. / Chih-Tang Sah, et al. | 2004
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Threshold voltage correction model for quantum short channelDawei Zhang, / Zhiping Yu, / Lilin Tian, et al. | 2004
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Mobility model of polysilicon thin-film transistor (poly-Si TFT)Gupta, N. / Tyagi, B.P. et al. | 2004
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Dopant profile extraction by inverse modeling of scanning capacitance microscopy using peak dC/dVHong, Y.D. / Yan, J. / Wong, K.M. / Yeow, Y.T. / Chim, W.K. et al. | 2004
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A simple method for effective channel length, series resistance and mobility extraction in deep-submicron MOSFETsChun-li Yu, / Yue Hao, / Lin-an Yang, et al. | 2004
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-
An analytical charge density model comprising 1D quantum mechanical (QM) effect for sub-100nm bulk silicon MOSFETsZhu Guangping, / Zhang Dawei, / Tian Lilin, et al. | 2004
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Simulation of quantum transport in an ultra-small SOI MOSFETGilbert, M.J. / Ferry, D.K. et al. | 2004
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Gate leakage models for device simulationGehring, A. / Selberherr, S. et al. | 2004
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Numerical modeling of quantum waveguide deviceYupeng Chen, / Wu, T.X. et al. | 2004
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Sub-100nm strained Si CMOS: device performance and circuit behaviorYang, L. / Watling, J.R. / Asenov, A. / Barken, J.R. / Roy, S. et al. | 2004
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Quantum effect simulation of SOI MOSFETs considering impact ionizationToyabe, T. et al. | 2004
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An accurate and efficient surface scattering model for Monte Carlo device simulationGrgee, D. / Jungemann, C. / Chi Dong Nguyen, / Neinhus, B. / Meinerzhagen, B. et al. | 2004
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Monte Carlo simulation of hole non-stationary transports in UTB SOI pMOSFETGang Du, / Xiaoyan liu, / Zhiliang Xia, / Ruqi han, et al. | 2004
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Simulation of RTD using quantum hydrodynamic modelLei Huang, / Zhiping Yu, / Cailan Xiang, et al. | 2004
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Impact of surface traps on downscaled InP/InGaAs DHBTsRuiz-Palmero, J.M. / Jackel, H. et al. | 2004
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Simulation and analysis of the high frequency performances of SiGe HBT with quantum well base regionWeiming Yang, / Chen Shi, / Sujuan Liu, / Jianxin Chen, et al. | 2004
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-
Investigation on the sources of 2DEG in Al/sub x/Ga/sub 1-x/N/GaN HEMTLijun Xue, / Ming Liu, / Yan Wang, / Yang Xia, / Zhijing He, / Long Ma, / Lihui Zhang, / Baoqin Chen, / Zhiping Yu, et al. | 2004
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Computational investigation of velocity overshoot effects in double gate MOSFETsHou, D.Q. / Xia, Z.L. / Du, G. / Liu, X.Y. / Wang, Y. / Kang, J.F. / Han, R.Q. et al. | 2004
- 1019
-
A simulation model of body contact structure in PD SOI analogue circuitJiang Fan, / Liu Zhong-li, et al. | 2004
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Compacted simulation: a new leakage current estimation methodYongjun Xu, / Jinghua Chen, / Zuying Luo, / Xiaowei Li, et al. | 2004
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Unified model for on-chip interconnectsSunil Yu, / Sang-Pil Sim, / Krishnan, S. / Petranovic, D.M. / Kwyro Lee, / Yang, G.Y. et al. | 2004
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New mechanisms governing diffusion in silicon for transistor manufactureSeebauer, E.G. et al. | 2004
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An efficient algorithm for 3-D interconnect capacitance extraction considering the floating dummy-fillsWenjian Yu, / Mengsheng Zhang, / Zeyi Wang, et al. | 2004
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Efficient 3-D interconnect capacitance extraction based on direct solving techniques for system with multiple right-hand sidesHong Liu, / Wenjian Yu, / Zeyi Wang, et al. | 2004
- 1046
-
3D-IC performance computing of single-gate SOI CMOS inverterLi Wenshi, / Zhang Yan, / Zhao Heming, / Xu Qi-an, et al. | 2004
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-
Modeling the effects of patterning error on MOSFETPun, C.H. / Lai, P.T. / Wong, A.K.K. et al. | 2004
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Defects in ion implantation and annealing studied by atomistic modelMin Yu, / Rong Wang, / Huihui Ji, / Xiaokang Shi, / Kai Zhan, / Yangyuan Wang, / Jinyu Zhang, / Hideki Oka, et al. | 2004
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Multiple ion implantation simulation by TSUPREM-IVJinyu Zhang, / Kunihiro Suzuki, / Hideki Oka, et al. | 2004
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A new damage model for ion implantation simulation with molecular dynamics methodRong Wang, / Min Yu, / Kai Zhan, / Xiaokang Shi, / Huihui Ji, / Jinyu Zhang, / Hideki Oka, et al. | 2004
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A content-driven model-based OPC toolMa Yue, / Shi Zheng, / Chen Ye, / Yan Xiaolang, et al. | 2004
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A study of parametric yield estimation by uniform design samplingMing-e Jing, / Jun-ping Wang, / Ke-dong Chen, / Yue Hao, et al. | 2004
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-
3D simulation of profile evolution in silicon DRIERongchun Zhou, / Haixia Zhang, / Yilong Hao, / Yangyuan Wang, et al. | 2004
- 1076
-
A two dimensional dynamic cellular automata model for simulation of photoresist etching processZai-fa Zhou, / Qing-An Huang, / Wei-hua Li, et al. | 2004
- 1080
-
Correction simulation for simultaneous suppression of overlaps and side-lobes in attenuated PSM lithographyHoong-Joo Lee, / Jun-Ha Lee, et al. | 2004
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-
Circuit model parameter generation with TCAD simulationJun-Ha Lee, / Hoong-Joo Lee, et al. | 2004
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A novel analytical thermal model for temperature estimation of multilevel ULSI interconnectsWang Nai-long, / Zhou Run-de, et al. | 2004
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Elmore delay estimation of two adjacent coupling interconnectsDong Gang, / Yang Yintang, / Li Yuejin, et al. | 2004
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Simulation of etched profile based on singular point splitting algorithmYu Li, / Ruiwei Li, / Jimin Wang, / Yuxia Fu, et al. | 2004
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Reaction mechanism of ZrCl/sub 4/ with Ge/Si(100)-(2/spl times/1): A density functional theory study of initial stage of ZrO/sub 2/ atomic layer deposition on SiGe alloy surfaceWo Chen, / Zhang, D.W. / Jie Ren, / Hong-Liang Lu, / Jian-Yun Zhang, / Min Xu, / Ji-Tao Wing, / Li-Kong Wang, et al. | 2004
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Yield modeling based on circular defect size and a real defect rectangular degreeJunping Wang, / Yue Hao, / Hongxia Liu, / Ming E Jing, et al. | 2004
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An improved statistical modeling method based on silicon plant back-end ET dataYifan Gao, et al. | 2004
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Noise modeling of Si and SiGe devicesJungemann, C. / Neinhus, B. / Meinerzhagen, B. et al. | 2004
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MOSFET modeling for RF-circuit simulationMiura-Mattausch, M. / Mattausch, H.J. / Ohguro, T. / Iizuka, T. / Taguchi, M. / Kumashiro, S. / Miyamoto, S. et al. | 2004
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An overview of device modeling in bridging manufacturing and design for RF applicationsYuhua Cheng, et al. | 2004
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Non-quasi-static modeling of heterojunction bipolar transistorsAbdel-Motaleb, I.M. et al. | 2004
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An analytical high frequency noise model for hot-carrier stressed MOSFETsHeng-Fa Teng, / Jang, S.L. et al. | 2004
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CMOS transistor mismatch model with temperature effect for HSPICE and SPECTRETan, P.B.Y. / Kordesch, A.V. / Sidek, O. et al. | 2004
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-
Mathematical basis of the expressions used by the integral function method for the determination of nonlinear harmonic distortion in devices and circuitsCerdeira, A. / Estrada, M. et al. | 2004
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Nonlinear distortion simulation algorithm with capability of distortion diagnosis for analog and RF integrated circuitsLin Zhang, / Li Zhang, / Zhiping Yu, et al. | 2004
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A new closed-form expression for capacitive coupling of lossy substrateWei Gao, / Zhiping Yu, et al. | 2004
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An improved methodology for analysis of s-parameter measurements on substrate crosstalk test structuresJing Li, / Weiying Li, / Wang, R. / Linpeng Wei, / Jian Yang, / Hongwei Zhao, et al. | 2004
- 1159
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Boundary element method for substrate resistance calculationXiren Wang, / Wenjian Yu, / Zeyi Wang, et al. | 2004
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-
Small signal non-quasi-static model for AlGaN/GaN MODFETsChintakayala, R. / Abdel-Motaleb, I. et al. | 2004
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-
Impact of leakage currents on MOSFET noise performance in deep sub-micron regimeHongwei Liu, / Guoyan Zhang, / Ru Huang, / Xing Zhang, et al. | 2004
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Advanced compact modeling of logic devices toward CMOS scaling limitsAn, J.X. / Qiang Chen, / Qi Xiang, et al. | 2004
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Poisson-Boltzmann solutions to the one-dimensional oxide-silicon-oxide systemMan Wong, / Xuejie Shi, et al. | 2004
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Analytical thermal model for silicon-on-insulator MOSFET structuresCheng, M.C. / Feixia Yua, et al. | 2004
- 1186
-
Scaling properties of GOI MOSFETs in nano scale by full band Monte Carlo simulationLiu, X.Y. / Du, G. / Xia, Z.L. / Kang, J.F. / Wang, Y. / Han, R.Q. / Yu, Y.H. / Li, M.F. / Kwong, D.L. et al. | 2004
- 1192
-
A physics based analytical model of undoped body MOSFETsJin He, / Xi, J. / Mansun Chan, / Niknejad, A. / Chenming Mu, et al. | 2004
- 1196
-
A compact, continuous analytic I-V model for surrounding-gate MOSFETsChiang, T.K. / Chen, M.L. et al. | 2004
- 1200
-
Three dimensional analytical subthreshold model for non-rectangular cross-section FinFETsXusheng Wu, / Qiang Chen, / Chan, P.C.H. / Mansun Chan, et al. | 2004
- 1204
-
Analytical model for the threshold voltage of dual material gate (DMG) partially depleted SOI MOSFET and evidence for reduced short-channel effectsKumar, M.J. / Reddy, G.V. et al. | 2004
- 1208
-
TDCIV extraction of dopant-impurity concentration and oxide thickness in ultrathin gate oxide MOS transistorsJie, B.B. / Chin-Tang Sah, et al. | 2004
- 1212
-
Modeling the effects of concentration-dependent carrier mobilities and self-heating on the resistance of thermal sensor built on thin silicon on insulatorWu, Z.H. / Lai, P.T. et al. | 2004
- 1216
-
An improved strained-Si on Si/sub 1-x/Ge/sub x/ MOSFET mobility modelZhao Yang, / Zhang Dawei, / Tian Lilin, et al. | 2004
- 1220
-
Analog/mixed-signal and RF integrated circuit technologies for wireless communicationsBin Zhao, et al. | 2004
- 1226
-
A full-monolithic LNA in 0.18/spl mu/m SiGe: performance variation due to ESD protectionHaigang Feng, / Haolu Xie, / Wang, A. / Yuhua Cheng, / Lloyd, S. et al. | 2004
- 1230
-
A bumpy journey with GaAs IC foundries in Taiwan and new perspectives of HBT technology readiness for wireless communications in Asia Pacific marketLi-Wu Yang, / Chi, T. / Wang, D. / Huang, E. et al. | 2004
- 1236
-
Recent advances in CDMA power amplifier module developmentsWang, D. / Xinwei Wang, / Ping Li, / Tang, A. / Souchuns, C. / Wen Chen, / McNamara, B. / Xudong Wang, / Li Liu, / Apel, T. et al. | 2004
- 1242
-
Ultralow-voltage MTCMOS/SOI technology for batteryless mobile systemDouseki, T. et al. | 2004
- 1248
-
A new 5.5GHz LNA with gain control and turn-off control for dual-band WLAN systemsHaigang Feng, / Wang, A. / Li-wu Yang, et al. | 2004
- 1252
-
A 5GHz LNA with new compact gain controllable active balun for ISM band applicationsRajashekharaiah, M. / Upadhyaya, P. / Deukhyoun Heo, / Yi-Jan Emery Chen, et al. | 2004
- 1256
-
An RF CMOS differential negative resistance for Q-enhancementMadsen, P. / Larsen, T. / Mikkelsen, J.H. / Lindof, J.C. et al. | 2004
- 1260
-
A high phase accuracy, low amplitude mismatch quadrature LO driverHan Shuguang, / Chi Baoyong, / Wang Zhihua, et al. | 2004
- 1264
-
A concurrent 0.18-/spl mu/m CMOS self-biased dual-band driver amplifier for IEEE 802.11 a/b/gJou, C.F. / Kuo-Hua Cheng, / Jia-Liang Chen, et al. | 2004
- 1268
-
A high bandwidth and wide dynamic range optical receiverHong-Yi Huang, / Chum-Ting Chen, et al. | 2004
- 1272
-
A noise model for the analog correlatorChunjiang Tu, / Boan Liu, / Hongyi Chen, et al. | 2004
- 1276
-
CMOS RF IC design challengesPengfei Zhang, et al. | 2004
- 1282
-
Single chip RF transceiver for PHS (Xiao-Ling-Tong) phoneLi, L.B. / Zhang, L. / Jiang Cao, / Yang, J. et al. | 2004
- 1285
-
Integration of RF front-end modules in cellular handsetsWang-Chang, / Gu, A. et al. | 2004
- 1291
-
Meeting the design challenges in modern RFCMOS technologyXudong Wang, / Pekarik, J. / Xiaojuen Yuan, / Raghunadha Anna, / Parker, S. et al. | 2004
- 1295
-
A new 0.25-/spl mu/m CMOS doubly balanced sub-harmonic mixer for 5-GHz ISM band direct conversion receiverUpadhyaya, P. / Rajashekharaiah, M. / Deukhyoun Heo, / Yi-Jan Emery Chen, et al. | 2004
- 1299
-
A novel image rejection CMOS mixer using T-structure filterAnh-Tuan Pham, / Chang-Wan Kim, / Min-Suk Kang, / Mun-Suk Chong, / Sang-Gug Lee, / Chun Deok Su, et al. | 2004
- 1303
-
A novel technique to improve amplitude imbalance in mixersDong Feng, / Bingxue Shi, et al. | 2004
- 1307
-
Low cost K-band CPW rat-race mixerChuang Wang, / Xiao-wei Sun, / Rong Qian, et al. | 2004
- 1311
-
A 5-GHz CMOS VCO for IEEE 802.11a WLAN applicationLi Zhang, / Zhihua Wang, / Hongyi Chen, et al. | 2004
- 1315
-
A 4.8GHz CMOS fully-integrated LC balanced oscillator with symmetry noise filtering techniqueFenglin Yang, / Zhaofeng Zhang, / Baoqi Li, / Hao Min, et al. | 2004
- 1321
-
Differentially tuned LC-VCO using modified anti-parallel structureHyunwon Moon, / Kwyro Lee, et al. | 2004
- 1325
-
A 1.8-2GHz VCO with automatic compensation for bond wire inductance variationShaojun Wu, / El-Masry, E.I. et al. | 2004
- 1329
-
A 2.4 GHz fully integrated CMOS LC VCOHao Shi, / Guoyan Zhang, / Yangyuan Wang, et al. | 2004
- 1333
-
Design of CMOS high speed self-regulating VCO using negative skewed delay schemeGe Yan, / Chen Zhongjian, / Fen Wennan, / Ji Lijiu, et al. | 2004
- 1337
-
Application-oriented platform-based SoC design technologyShaojun Wei, / Yanhui Yang, et al. | 2004
- 1341
-
An enhanced, system-centric, fully hierarchical design method to enable nanometer system-on-chip IC developmentKhan, A. et al. | 2004
- 1347
-
Non-contact inter-chip data communications technology for system in a packageKitroda, T. et al. | 2004
- 1353
-
SOC for telephone terminal with SMS supportChun Zhang, / Kun Yang, / Yanqing Ning, / Guo Zhang, / Yan Zhao, / Liying Huangfu, et al. | 2004
- 1356
-
Design of portable infrared business card exchange system on chipHan Yan, / Shi Minwen, / Du Hongyue, et al. | 2004
- 1360
-
Constraint-based watermarking technique for hard IP core protection in physical layout design levelMin Ni, / Zhiqiang Gao, et al. | 2004
- 1364
-
Implementation of DSR algorithm using VHDL in wireless ad-hoc networkSankar, P. et al. | 2004
- 1368
-
A design approach for GALS based systems-on-chipShengxian Zhuang, / Carlsson, J. / Wanhammar, L. et al. | 2004
- 1372
-
An improved DMA controller for high speed data transfer in MPU based SOCHang Yuan, / Hongyi Chen, / Guoqiang Bai, et al. | 2004
- 1376
-
Micro-architecture optimization of THUMP105 SOC implementationZhang Sheng, / Yang Qian, / Zhou Runde, et al. | 2004
- 1380
-
The design of an IEEE802.11 WLAN hardware MACAnping Jiang, / Fang Ren, / Gang Li, / Yuedong Pang, / Teng Ban, / Weizhong Gou, / Xinan Wang, et al. | 2004
- 1384
-
The implementation of an out-of-order execution floating point unitLuo Min, / Bai Yong-Qiang, / Shen Xu-Bang, / Gao De-Yuan, et al. | 2004
- 1388
-
An embedded CMOS voltage reference IP coreZhangming Zhu, / Yintang Yang, et al. | 2004
- 1392
-
A PCI target device with re-reusing PCI AD busGan-min Zhou, / Ming-lun Gao, / Yong-hua Hu, / Hua-feng Cao, et al. | 2004
- 1396
-
Integrate binary mapping into task scheduling for hardware/software partitioningYiPin Peng, / Lin Ming, et al. | 2004
- 1400
-
A generic interface modeling approach for SOC designKun Tong, / Haili Wang, / Jinian Bian, et al. | 2004
- 1404
-
Test scheduling for core-based SOCsZhang Yong guang, / Xu Yuan xin, / Dong Bin, / Wang Kuang, et al. | 2004
- 1408
-
Microsystems dedicated to wireless multichannel monitoring and microstimulation: design, test and packagingSawan, M. et al. | 2004
- 1412
-
Power management for modern VLSI loads using dynamic voltage scalingWai Tung Ng, / Trescases, O. et al. | 2004
- 1416
-
Digital domain time amplification in CMOS processOulmane, M. / Roberts, G.W. et al. | 2004
- 1421
-
Overview of mixed signal methodology for digital full-chip design/verificationWaisum Wong, / Xiaofang Gao, / Yang Wang, / Vishwanathan, S. et al. | 2004
- 1425
-
A 1.8V CMOS fourth-order Gm-C bandpass sigma-delta modulator dedicated to front-end ultrasonic receiversLisheng Qin, / El-Sankary, K. / Sawan, M. et al. | 2004
- 1429
-
A 3.125Gbit/s CMOS clock and data recovery circuitGuo Gan, / Huang Lin, / Ye Jinghua, / Chen Yihui, / Hong Zhiliang, et al. | 2004
- 1433
-
A temperature independent current reference in ROICJu Tang, / Wengao Liu, / Zhongjian Chen, / Wentao Cui, / Dan Liu, / Xin Zhang, / Lijiu Ji, et al. | 2004
- 1437
-
Correlated double sample design for CMOS image readout ICGao Jun, / Chen Zhongjian, / Lu Wengao, / Cui Wentao, / Ji Lijiu, et al. | 2004
- 1441
-
The study of dual-window random addressable ROICLu Wengao, / Chen Zhongjian, / Gao Jun, / Liu Dan, / Tang Ju, / Song Ying, / Liu Jing, / Cui Wentao, / Ji Lijiu, et al. | 2004
- 1445
-
A novel 1.8V rail-to-rail CMOS operational amplifierZhangming Zhu, / Yintang Yang, / Yan Zhai, et al. | 2004
- 1449
-
An op-amp with novel push-pull output stage for IRFPA ROICLiu Jing, / Gao Jun, / Chen Zhongjian, / Cui Wentao, / Zhao Baoying, / Ji Lijiu, et al. | 2004
- 1453
-
A high speed CMOS amplifier with active feedforward compensation for contactless card readerBangtian Jia, / Yuanqing Ge, / Zhiliang Chen, et al. | 2004
- 1457
-
Analysis and design of fully differential gain-boosted telescopic cascode opampWang Jin, / Qiu Yulin, et al. | 2004
- 1461
-
A dual complex pole-zero cancellation compensation mode for three-stage amplifierQiang Li, / Jun Yi, / Bo Zhang, / Jian Fang, / Ping Luo, / Zhaoji Li, et al. | 2004
- 1465
-
Design of ultra-low voltage op amp based on quasi-floating gate transistorsLe-ning Ren, / Zhang-ming Zhu, / Yin-tang Yang, et al. | 2004
- 1469
-
1.25 Gb/s low power CMOS limiting amplifier for optical receiverTian Jun, / Shi Yi, / Zheng Youdou, / Wang Zhigong, / Liang Bangli, / Hu Van, et al. | 2004
- 1472
-
A CMOS hybrid control mode DC-DC buck converter for embedded systemLi Geng, / Jianhuan Li, / Weiyang Xu, / Qinghua Li, et al. | 2004
- 1476
-
High-performance frequency dividers utilizing differential lockingFujishima, M. / Yamamoto, K. et al. | 2004
- 1482
-
Fingerprint sensor technology - sensor structure/chip, sensing scheme, and systemMorimura, H. / Shigematsu, S. / Okazaki, Y. / Machida, K. et al. | 2004
- 1488
-
Analysis and design of 5GHz phase locked loopsJinghui Lu, et al. | 2004
- 1492
-
A low power, fast-switching frequency synthesizer of 5.2GHz WLANsKuo-Hua Cheng, / Cheng-Hung Chen, / Jou, C.F. et al. | 2004
- 1496
-
High frequency, low power frequency divider with quadrature outputs and low added phase noiseWeigang Sun, / Huainan Ma, / Wenshen Wang, et al. | 2004
- 1500
-
A monolithic 1 GHz 0.6 mu m CMOS low jitter PLLTian, Jun / Wang, Zhigong / Liang, Bangli / Hu, Yan / Shi, Yi / Zheng, Youdou et al. | 2005
- 1500
-
A monolithic 1 GHz 0.6/spl mu/m CMOS low jitter PLLTian Jun, / Wang Zhigong, / Liang Bangli, / Hu Yan, / Shi Yi, / Zheng Youdou, et al. | 2004
- 1504
-
1GHz monolithic high spectrum purity fractional-N frequency synthesizer with a 3-b third-order delta-sigma modulatorBaoyong Chi, / Xiaolei Zhu, / Shutlong Huang, / Zhihua Wang, et al. | 2004
- 1508
-
A CMOS digital PLL with improved lockingSujuan Liu, / Jianxin Chen, / Liming Cai, / Dongsheng Xu, et al. | 2004
- 1512
-
A generalized MASH architecture in fractional-N synthesizerYinghui Zhu, / Zhibiao Shao, / Wenyu Pang, et al. | 2004
- 1516
-
A stack-mode low power prescaler in ISM band ASK receiverLiang Hong, / Yongsheng Xu, / Zongsheng Lai, et al. | 2004
- 1519
-
Frequency characteristic analysis and design of high speed current-steering CMOS digital-to-analog converterZhangming Zhu, / Yintang Yang, et al. | 2004
- 1523
-
A 10-bit 100MSPS 0.35 /spl mu/m Si CMOS pipeline ADCQi Yu, / Xiang-zhan Wang, / Ning Ning, / Lin Tang, / Hong-Bin Li, / Mo-hua Yang, et al. | 2004
- 1526
-
A 10-bit 20-Msample/s 49mW CMOS pipelined A/D converterYongjian Tang, / Lenian He, / Ning Xie, / Xi Chen, / Kun Yin, / Xiaolang Yan, et al. | 2004
- 1530
-
Design of a CPPLL-based clock multiplier for USB hubGong Qian, / Li Su-jie, / Li Zhi-qian, / Yuan Guo-shun, et al. | 2004
- 1535
-
Design and optimization of an integrated 1GHz PLL IP for microprocessorsZhao Bobxing, / Guo Huimin, / Zhou Hong, / Chen Tie, et al. | 2004
- 1539
-
Pulsewidth control loop circuit using combined charge pumps and miller schemeHong-Yi Huang, / Wei-Ming Chiu, / Wei-Ming Lin, et al. | 2004
- 1543
-
A novel multiphase clock generator based on digital DLL designed for oversampling in transceiverXi Jianxiong, / He Lenian, / Li Haoliang, / Yan Xiaolang, et al. | 2004
- 1547
-
A 2.5 GHz CMOS dual-modulus prescaler for RF frequency synthesizerWen-Rong Yang, / Jia-Lin Lao, / Fen Ran, / Jian Wang, et al. | 2004
- 1551
-
A low noise current-controlled oscillator with high control linearityZhu Hui, / Xiang Bin, / Ni Xue-Wen, / Mo Bang-Xian, / Wang Zhan-Fei, et al. | 2004
- 1555
-
A CMOS charge pump with a novel structure in PLLZhang Tao, / Zou Xuecheng, / Shen Xubang, et al. | 2004
- 1559
-
A 5V 8b 40MSample/s pipelined analog-to-digital converterXue Liang, / Shen Yanzhao, / Zhang Xiangimin, et al. | 2004
- 1563
-
A CMOS 10-bit low-power pipelined A/D converterDai Guo-ding, / Liu Feng, / Zhuang Yi-qi, et al. | 2004
- 1567
-
A dynamic CMOS comparator with high precision and resolutionWu Rang, / Wu Xiaobo, / Yan Xiaolang, et al. | 2004
- 1571
-
A high sensitivity capacitive fingerprint sensor with double sensing platesJing Wu, / Xinan Wang, / Congqing Xiong, / Jun Ye, et al. | 2004
- 1575
-
A dual-mode serial link transmitter with controlled slew rateHaoliang Li, / Lenian He, / Xinmin Xu, / Xiaolang Yan, et al. | 2004
- 1579
-
Hot swap controller and its control strategy designZhang Danyan, / Wu Xiaobo, / Zhao Menglian, / Yan Xiaolang, et al. | 2004
- 1583
-
A precise compensated bandgap reference without resistorsSong Ying, / Lu Wengao, / Chen Zhongjian, / Gao Jun, / Tang Ju, / Ji Lijiu, et al. | 2004
- 1587
-
An analog fuzzy processor using neuron-MOS technologyYu Ning mei, / Chen Jingjin, et al. | 2004
- 1591
-
CMOS design of analog neuro-fuzzy system with improved circuitsWei-Zhi Wang, / Dong-Ming Jin, et al. | 2004
- 1595
-
Technologies for a mobile multimedia microprocessorUchiyama, K. / Arakawa, F. / Yamada, T. / Ishikawa, M. / Ozawa, M. / Kamei, T. et al. | 2004
- 1601
-
A DSP-coprocessor architecture for image/video applications [coding/decoding]Minxue Liang, / Jie Chen, et al. | 2004
- 1605
-
A data hazard detection method for DSP with heavily compressed instruction setYu Qiao-yan, / Liu Peng, / Yao Qing-dong, et al. | 2004
- 1609
-
DSP architecture for motion estimation accelerationYang Kun, / Zhang Chun, / Mai Songping, / Wang Zhihua, et al. | 2004
- 1613
-
Low power scalable DCT design based on scalers sharing multiplier [video coding applications]Liu Feng, / Dai Guoding, / Zhuang Yiqi, et al. | 2004
- 1617
-
Design of high speed arithmetic encoder [image coding applications]Mei Kuizhi, / Zheng Nanning, / Yao Ji, / Liu Yuehu, et al. | 2004
- 1621
-
High performance synchronous DRAMs controller in H.264 HDTV decoderJiahui Zhu, / Ligang Hou, / Wuchen Wu, / Ronggang Wang, / Chao Huang, / JinTao Li, et al. | 2004
- 1625
-
Harmonic elimination of inverters using blind signal separationRabi, B.J. / Parithimarkalaignan, T. / Arumugam, R. et al. | 2004
- 1629
-
Locally self-resetting CMOS in multi-port register file designWang Fang, / Jia Song, / Ji Lijiu, et al. | 2004
- 1633
-
VLSI implementation of full pixel motion estimation processor for MPEG-4 AS profileWei-Feng He, / Zhi-Gang Mao, / Zhi-Qiang Gao, / Yi-Zheng Ye, et al. | 2004
- 1637
-
A novel LOP to improve the normalization of the FP adder in DSPsFang Jianping, / HaoYue, / Che DeLiang, et al. | 2004
- 1641
-
An novel FDWT and IDWT architecture for JPEG2000Ke Zhu, / Fang Wang, / Xiao-Fang Zhou, / Qian-ling Zhang, et al. | 2004
- 1645
-
An asynchronous data-path design for Viterbi decoderZhao Bing, / Hei Yong, / Qiu Yulin, et al. | 2004