Measurement and analysis of parasitic capacitance in FinFETs with high-k dielectrics and metal-gate stack (English)
- New search for: Dixit, A.
- New search for: Bandhyopadhyay, A.
- New search for: Collaert, N.
- New search for: Meyer, K. de
- New search for: Jurczak, M.
- New search for: Dixit, A.
- New search for: Bandhyopadhyay, A.
- New search for: Collaert, N.
- New search for: Meyer, K. de
- New search for: Jurczak, M.
In:
International Conference on VLSI Design, 22
;
253-258
;
2008
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ISBN:
- Conference paper / Print
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Title:Measurement and analysis of parasitic capacitance in FinFETs with high-k dielectrics and metal-gate stack
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Contributors:Dixit, A. ( author ) / Bandhyopadhyay, A. ( author ) / Collaert, N. ( author ) / Meyer, K. de ( author ) / Jurczak, M. ( author )
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Published in:
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Publisher:
- New search for: IEEE Operations Center
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Place of publication:Piscataway
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Publication date:2008
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Size:6 Seiten, 20 Quellen
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ISBN:
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Type of media:Conference paper
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Type of material:Print
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Language:English
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Keywords:
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Source:
Table of contents conference proceedings
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- 587
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Author index| 2009
- 592
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Roster Page| 2009
- C1
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Cover Art| 2009
- i
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Title Page i| 2009
- iii
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Title Page iii| 2009
- iv
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Copyright Page| 2009
- v
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Table of Contents| 2009
- xix
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Message from the Organizing Chair| 2009
- xl
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Embedded Systems Design Conference History| 2009
- xli
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About the Cover| 2009
- xlii
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Keynote Speakers| 2009
- xv
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Message from the General Chairs| 2009
- xvii
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Message from the Program Chairs| 2009
- xx
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Conference Steering Committee| 2009
- xxi
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Conference Committee| 2009
- xxiv
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Technical Program Committee| 2009
- xxvii
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Reviewers| 2009
- xxxii
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Tutorial Committee| 2009
- xxxiii
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Fellowship Recipients| 2009
- xxxix
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VLSI Design Conference History| 2009
- xxxviii
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VLSI Design 2008 Awards| 2009