How to minimize resist usage during spin coating (English)
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In:
Semiconductor International
;
21
, 6
;
179-190
;
1998
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ISSN:
- Article (Journal) / Print
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Title:How to minimize resist usage during spin coating
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Additional title:Untersuchungen zur Effektivität bei der Beschichtung von Wafer's mittels Abdeckmitteln
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Contributors:Lorefice, B. ( author ) / Chen, D. ( author ) / Mullen, B. ( author ) / Gurer, E. ( author ) / Savage, R. ( author ) / Reynolds, R. ( author )
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Published in:Semiconductor International ; 21, 6 ; 179-190
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Publisher:
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Publication date:1998
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Size:7 Seiten, 11 Bilder, 2 Tabellen, 2 Quellen
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ISSN:
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Coden:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
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Keywords:
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Source:
Table of contents – Volume 21, Issue 6
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 10
-
Staff| 1998
- 15
-
Editorial: What's Wrong with Today's Research| 1998
- 17
-
Industry Watch| 1998
- 18
-
Industry News| 1998
- 68
-
Emerging Technologies -- Surface Emitting Lasers Open New Roads| 1998
- 70
-
Wafer Processing -- Nonuniformity of Copper Electroplating Studied| 1998
- 72
-
Yield Management -- Fab Eliminates Yield Loss due to Manual Wafer Handling| 1998
- 74
-
Lithography -- 100 nm Features Using DUV| 1998
- 76
-
Assembly & Packaging -- Using Flex for CSPs -- Plasma Wafer Thinning| 1998
- 80
-
Clean Processing -- Advantages of Creating Buffered HF at the Point-of-Use| 1998
- 84
-
Inspection, Measurement & Test -- PPT -- Time for a Reality Check?| 1998
- 90
-
Tantalum, Copper and Damascene: The Future of Interconnects| 1998
- 105
-
The Environment, Health and Safety Side of Copper Metalization| 1998
- 117
-
The Challenges of the Copper CMP Clean| 1998
- 127
-
Sputtering Targets Adapt to New Materials and Shrinking Architectures| 1998
- 139
-
Options for CVD of dielectric include low-k materialsBaliga, J. et al. | 1998
- 139
-
Options for CVD of Dielectrics Include Low-k Materials| 1998
- 151
-
Dielectric Anisotropy in CVD Polymer Thin Films| 1998
- 163
-
300 mm Wafers: Implications to Fab Architecture| 1998
- 173
-
Surface Contamination Control Using Integrated Cleaning| 1998
- 179
-
How to Minimize Resist Usage During Spin Coating| 1998
- 195
-
Design and Validation of 0.25 mm Integrated Circuit Yield Model| 1998
- 195
-
Design and Validation of 0.25 m Integrated Circuit Yield Model| 1998
- 195
-
Design and validation of 0.25 micron integrated circuit yield modelLakhani, F. / Dance, D.L. / Williams, R. et al. | 1998
- 203
-
Replacing C-V Monitoring with Noncontact COS Charge Analysis| 1998
- 211
-
Backside Emission Microscopy Pinpoints Wafer Level Defects| 1998
- 217
-
GDMS Applied to Materials Analysis| 1998
- 223
-
SEMICON Applied to Materials Analysis Format| 1998
- 223
-
SEMICON West 98 Repeats Two-City| 1998
- 228
-
Industry Observation: Role of the Small-to-Medium Equipment Manufacturer in Today's Mergers and Acquisitions| 1998
- 234
-
New Products| 1998
- 313
-
Company News| 1998
- 314
-
Classified Advertising| 1998
- 316
-
People in the News| 1998
- 320
-
Calendar of Events| 1998
- 322
-
SEMI Report| 1998
- 324
-
Sales Representatives| 1998
- 326
-
Semiconductor Equipment Monitor| 1998
- 328
-
Electronics Industry Update| 1998
- 330
-
Advertisers' Index| 1998
- 332
-
The Flip Side| 1998