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An algorithm for obstacle-avoiding clock routing tree construction with multiple TSVs on a 3D IC
British Library Online Contents | 2019| -
Fluid-level synthesis unifying reliability, contamination avoidance, and capacity-wastage-aware washing for droplet-based microfluidic biochips
British Library Online Contents | 2019| -
Soft-error reliable architecture for future microprocessors
British Library Online Contents | 2019| -
Efficient composition of scenario-based hardware specifications
British Library Online Contents | 2019| -
Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structures
British Library Online Contents | 2019| -
SUBHDIP: process variations tolerant subthreshold Darlington pair-based NBTI sensor circuit
British Library Online Contents | 2019| -
Scheduling configuration memory error checks to improve the reliability of FPGA-based systems
British Library Online Contents | 2019| -
RASSS: a hijack-resistant confidential information management scheme for distributed systems
British Library Online Contents | 2019| -
Vertex decomposition method for wirelength problem and its applications to enhanced hypercube networks
British Library Online Contents | 2019| -
Yield modelling and analysis of bundled data and ring-oscillator based designs
British Library Online Contents | 2019| -
Study of the monte–carlo fault injection simulator to measure a fault derating
British Library Online Contents | 2019| -
State retained dual- V th feedback sleeper-stack for leakage reduction
British Library Online Contents | 2019| -
HASTI: hardware-assisted functional testing of embedded processors in idle times
British Library Online Contents | 2019| -
Probabilistic timing analysis of time-randomised caches with fault detection mechanisms
British Library Online Contents | 2019| -
Radix-4 3 based two-dimensional FFT architecture with efficient data reordering scheme
British Library Online Contents | 2019| -
Efficient digital implementation of a multi-precision square-root algorithm
British Library Online Contents | 2019| -
Circuit enclaves susceptible to hardware Trojans insertion at gate-level designs
British Library Online Contents | 2018| -
Register array-based sum of absolute difference processor with parallel memory system for fast motion estimation
British Library Online Contents | 2018|
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