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A one-path subsampling quadrature receiver based on a Sigma Delta modulator with distributed resonators
British Library Conference Proceedings | 2011| -
A one-path subsampling quadrature receiver based on a ΣΔ modulator with distributed resonators
British Library Online Contents | 2011| -
A 7 mW 20 MHz BW Time-Encoding Oversampling Converter Implemented in a 0.08 mm2 65 nm CMOS Circuit
Online Contents | 2011| -
A one-path subsampling quadrature receiver based on a ΣΔ modulator with distributed resonators
Online Contents | 2011| -
Design and implementation of a band-pass sigma delta modulator with distributed resonators
British Library Online Contents | 2009| -
A 0.1 mm2, Wide Bandwidth Continuous-Time ΣΔ ADC Based on a Time Encoding Quantizer in 0.13 µm CMOS
Online Contents | 2009| -
Multistage ADC based on integrating quantiser and gated ring oscillator
British Library Online Contents | 2013| -
Continuous time Sigma Delta modulator based on digital delay loop and time quantisation
British Library Online Contents | 2010| -
A subsampling bandpass Sigma Delta modulator with lumped and distributed resonators
Tema Archive | 2008| -
Analog-to-Digital Conversion Using Noise Shaping and Time Encoding
British Library Online Contents | 2008| -
A 7 mW 20 MHz BW Time-Encoding Oversampling Converter Implemented in a 0.08 mm Formula Not Shown 65 nm CMOS Circuit
British Library Conference Proceedings | 2011| -
A 7 mW 20 MHz BW Time-Encoding Oversampling Converter Implemented in a 0.08 mm Formula Not Shown 65 nm CMOS Circuit
British Library Online Contents | 2011|
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