Solder Parameter Sensitivity for CSP Life-Time Prediction Using Simulation-Based Optimization Method (English)
- New search for: Vandevelde, B.
- New search for: Beyne, E.
- New search for: Zhang, K.
- New search for: Caers, J.
- New search for: Institute of Electrical and Electronics Engineers
- New search for: Vandevelde, B.
- New search for: Beyne, E.
- New search for: Zhang, K.
- New search for: Caers, J.
- New search for: Institute of Electrical and Electronics Engineers
In:
Electronic components and technology conference
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281-287
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2001
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ISBN:
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ISSN:
- Conference paper / Print
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Title:Solder Parameter Sensitivity for CSP Life-Time Prediction Using Simulation-Based Optimization Method
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Contributors:Vandevelde, B. ( author ) / Beyne, E. ( author ) / Zhang, K. ( author ) / Caers, J. ( author ) / Institute of Electrical and Electronics Engineers
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Conference:51st, Electronic components and technology conference ; 2001 ; Orlando, FL
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Published in:
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Publisher:
- New search for: IEEE
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Publication date:2001-01-01
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Size:7 pages
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ISBN:
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ISSN:
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Type of media:Conference paper
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Type of material:Print
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Language:English
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Keywords:
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Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 0_1
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2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)| 2001
- 1
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Improved VCSEL structures for 10 gigabit-Ethernet and next generation optical-integrated PC-boardsMederer, F. / Jager, R. / Joos, J. / Kicherer, M. / King, R. / Michalzik, R. / Riedl, M. / Unold, H. / Ebeling, K.J. / Lehmacher, S. et al. | 2001
- 8
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Highly alignment tolerant InGaAs inverted MSM photodetector heterogeneously integrated on a differential Si CMOS receiver operating at 1 GbpsVrazel, M. / Jae Joon Chang, / In-Dal Song, / KeeShik Chung, / Brooke, M. / Jokerst, N.M. / Brown, A. / Wills, D.S. et al. | 2001
- 14
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3.125 Gbps/channel 4-channel parallel optical transmitter and receiver module with MT-RJ receptacleYoneda, I. / Yamauchi, K. / Yunoki, S. / Matsumoto, K. / Nakamura, T. / Miyoshi, K. / Nagahori, T. et al. | 2001
- 20
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Passively aligned fiber-optic transmitter integrated into LTCC moduleKarppinen, M. / Kautio, K. / Heikkinen, M. / Hakkila, J. / Karioja, P. / Jouhti, T. / Tervonen, A. / Oksanen, M. et al. | 2001
- 26
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Low cost CWDM optical transceiversGrann, E.B. et al. | 2001
- 30
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Short wave SFF small form factor transceiversAbe, S. / Tobita, K. / Shinozaki, T. / Arai, K. / Takeshita, K. / Tanaka, K. / Isono, Y. et al. | 2001
- 35
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Encapsulated double-bump WL-CSP: design and reliabilityKeser, B. / Yeung, B. / White, J. / Fang, T. et al. | 2001
- 40
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Development of low-cost and highly reliable wafer process packageKazama, A. / Satoh, T. / Yamaguchi, Y. / Anjoh, I. / Nishimura, A. et al. | 2001
- 47
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A design and manufacturing solution for high-reliable, non-leaded CSPs like QFNKuhnlein, G. et al. | 2001
- 54
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Wide Area Vertical Expansion (WAVE™) Package Design for High Speed Application: Reliability and PerformanceKim, Y.-G. / Mohammed, I. / Seol, B.-S. / Kang, T.-G. / Institute of Electrical and Electronics Engineers et al. | 2001
- 54
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Wide area vertical expansion (WAVE/sup TM/) package design for high speed application: reliability and performanceYoung-Gon Kim, / Mohammed, I. / Byong-Su Seol, / Teck-Gyu Kang, et al. | 2001
- 63
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Development of low cost, highly reliable CSP using gold-gold interconnection technologyIsozaki, S. / Kimura, T. / Shimada, T. / Nakajima, H. et al. | 2001
- 69
-
A novel low-cost pluggable chip scale package for high pin-count applicationsCrane, S.W. / Jeon, J. / Ogata, C. / Wang, T. / Cangellaris, A. / Schutt-Aine, J. et al. | 2001
- 74
-
Moisture blocking planes and their effect on reflow performance in achieving reliable Pb-free assembly capability for PBGAsShook, R.L. / Gerlach, D.L. / Vaccaro, B.T. et al. | 2001
- 80
-
Whole field displacement measurement technique using speckle interferometryCote, K.J. / Dadkhah, M.S. et al. | 2001
- 85
-
Effect of underfill on BGA reliabilityPyland, J. / Raghuram Pucha, / Suresh Sitaraman, et al. | 2001
- 91
-
An accelerated reliability test method to predict thermal grease pump-out in flip-chip applicationsChia-Pin Chiu, / Biju Chandran, / Mello, K. / Kelley, K. et al. | 2001
- 98
-
Mechanism and growth rate of underfill delaminations in flip chipsJakschik, S. / Feustel, F. / Meusel, E. et al. | 2001
- 104
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Impact of JEDEC test conditions on new-generation package reliabilityMercado, L.L. / Chavez, B. et al. | 2001
- 111
-
Optimizing the package design with electrical modeling and simulationQuan Qi, / Quint, D. / Frank, M. / Michalka, T. / Bois, K. et al. | 2001
- 118
-
Package capacitors impact on microprocessor maximum operating frequencyWaizman, A. / Chee-Yee Chung, et al. | 2001
- 123
-
Design and packaging challenges for on-board cache subsystems using source synchronous 400 Mb/s interfacesNam Pham, / Cases, M. / Guertin, D. et al. | 2001
- 128
-
Microwave frequency model of wafer level package and increased loading effect on Rambus memory moduleJunwoo Lee, / Baekkyu Choi, / Seungyoung Ahn, / Woonghwan Ryu, / Jae Myun Kim, / Kwang Seong Choi, / Joon-Ki Hong, / Heung-Sup Chun, / Joungho Kim, et al. | 2001
- 133
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Over GHz low-power RF clock distribution for a multiprocessor digital systemWoonghwan Ryu, / Albert Lu Chee Wai, / Fan Wei, / Wai Lai Lai, / Joungho Kim, et al. | 2001
- 141
-
Modelling and characterisation of the polymer stud grid array (PSGA) package: electrical, thermal and thermo-mechanical qualificationArun Chandrasekhar, / Vandevelde, B. / Driessens, E. / Pieters, P. / Beyne, E. / De Raedt, W. / Nauwelaers, B. / Van Puymbroeck, J. et al. | 2001
- 149
-
Study on mobility of water and polymer chain in epoxy for microelectronic applicationsShijian Luo, / Leisen, J. / Wong, C.P. et al. | 2001
- 155
-
Influence of temperature and humidity on adhesion of underfills for flip chip packagingShijian Luo, / Wong, C.P. et al. | 2001
- 163
-
Viscosity of a no-flow underfill during reflow and its relationship to solder wettingMorganelli, P. / Wheelock, B. et al. | 2001
- 167
-
Study on the effect of toughening of no-flow underfill on fillet crackingKyoung-Sik Moon, / Lianhua Fan, / Wong, C.P. et al. | 2001
- 174
-
Flip-chip assembly development via modified reflowable underfill processPing Miao, / Yixin Chew, / Tie Wang, / Foo, L. et al. | 2001
- 181
-
Critical aspects of reworkable underfills for portable consumer productsHannan, N. / Puligandla Viswanadham, et al. | 2001
- 188
-
Low cost high-speed flip chip assembly processingGutentag, C. / Dudderar, T.D. et al. | 2001
- 193
-
Consideration of mechanical chip crack on FBGA packagesKiyono, S.S. / Yonehara, K. / Graf, R.S. / Howell, W.J. et al. | 2001
- 198
-
Breakthrough ball attach technology by introducing solder paste screen printingChin, Y.T. / Khor, C.K. / Sow, H.P. / Ooi, S.J. / Tan, H.B. et al. | 2001
- 203
-
Improvements and alternatives for ultra fine pitch encapsulationPaquet, M.-C. / Tremblay, A. / Ouimet, S. / Tetreault, R. / Toutant, R. et al. | 2001
- 210
-
Femtosecond micromachining applications for electro-optic componentsLeong, K.H. / Said, A.A. / Maynard, R.L. et al. | 2001
- 215
-
Unified system for manufacturing process control and data collectionBentlage, M. / Hamilton, B. / Neuberger, R. et al. | 2001
- 218
-
Novel monolithic VCSEL devices for datacom applicationsSteinle, G. / Wolf, H.D. / Popp, M. / Egorov, A.Yu. / Kristen, G. / Riechert, H. et al. | 2001
- 223
-
Optical solder effects of self-written waveguides in optical circuit devices couplingHirose, N. / Yoshimura, T. / Ibaragi, O. et al. | 2001
- 229
-
Lithographically fabricated fiber guides for optical subassembliesCohen, M.S. / Cordes, M.J. / Cordes, S.A. / Gelorme, J.D. / Kuchta, D.M. / Lacey, D.L. / Rosner, J. / Speidell, J.L. et al. | 2001
- 238
-
A silicon optical bench approach to low cost high speed transceiversGoodrich, J. et al. | 2001
- 242
-
Analysis and measures against heat-expansion for sub-micron LD assembly by passive alignmentYamauchi, A. / Arai, Y. et al. | 2001
- 247
-
Monte Carlo tolerance analysis of a passively aligned silicon waferboard packageBreedis, J.B. et al. | 2001
- 255
-
Predicting solder joint reliability for thermal, power, and bend cycle within 25% accuracySyed, A. et al. | 2001
- 264
-
On the effect of system constraints on mechanical integrity of high density packages used in telecommunication applicationsLangari, A.R. / Morris, W.L. / Kuhlman, M. / Hashemi, H.S. / Dadkhah, M.S. et al. | 2001
- 270
-
Design method for high reliable flip chip BGA packageSaito, N. / Yamada, O. / Ono, T. / Uda, T. et al. | 2001
- 276
-
Reliability study of high-pin-count flip-chip BGAYuan Li, / Xie, J. / Verma, T. / Wang, V. et al. | 2001
- 281
-
Solder parameter sensitivity for CSP life-time prediction using simulation-based optimization methodVandevelde, B. / Beyne, E. / Zhang, K. / Caers, J. et al. | 2001
- 288
-
Characterization of molded underfill material for flip chip ball grid array packagesLiu, F. / Wang, Y.P. / Chai, K. / Her, T.D. et al. | 2001
- 288
-
The Characterization of Molded Underfill Material for Flip Chip Ball Grid Array PackagesLui, F. / Wang, Y. P. / Chai, K. T. / Her, T. D. / Institute of Electrical and Electronics Engineers et al. | 2001
- 293
-
On the performance of epoxy molding compounds for flip chip transfer molding encapsulationRector, L.P. / Shaoqin Gong, / Gaffney, K. et al. | 2001
- 298
-
Development of new no-flow underfill materials for both eutectic solder and a high temperature melting lead-free solderHaiying Li, / Wong, C.P. et al. | 2001
- 304
-
Evaluation of commercially available, thick, photosensitive films as a stress compensation layer for wafer level packagingKeser, B. / Prack, E.R. / Fang, T. et al. | 2001
- 310
-
A novel approach for incorporating silica filler into no-flow underfillZhuqing Zhang, / Jicun Lu, / Wong, C.P. et al. | 2001
- 317
-
New developments in single pass reflow encapsulant for flip chip applicationLiu, J. / Kraszewski, R. / Xin Lin, / Wong, L. / Goh, S.H. / Allen, J. et al. | 2001
- 323
-
RF micromechanical switches that can be post processed on commercial MMICsSloan, L.R. / Sullivan, C.T. / Tigges, C.P. / Sandoval, C.E. / Palmer, D.W. / Hietala, S. / Christenson, T.R. / Dyck, C.W. / Plut, T.A. / Schuster, G.R. et al. | 2001
- 327
-
Modeling and design of RF MEMS structures using computationally efficient numerical techniquesBushyager, N.A. / Tentzeris, M.M. et al. | 2001
- 331
-
mm-wave microstrip and novel slot antennas on low cost large area panel MCM-D substrates-a feasibility and performance studyGrzyb, J. / Cottet, D. / Troster, G. et al. | 2001
- 339
-
Simultaneous switching noise suppression for high speed systems using embedded decouplingHobbs, J.M. / Windlass, H. / Sundaram, V. / Sungjun Chun, / White, G.E. / Swaminathan, M. / Tummala, R.R. et al. | 2001
- 344
-
Distributed Models for Multi-Terminal CapacitorsLi, Y.-L. / Elzinga, M. / Yahyaei-Moayyed, F. / Institute of Electrical and Electronics Engineers et al. | 2001
- 348
-
Modeling and evaluating leadframe CSPs for RFICs in wireless applicationsHorng, T.S. / Wu, S.M. / Huang, H.H. / Chiu, C.T. / Hung, C.P. et al. | 2001
- 353
-
Advanced packaging technologies on 3D stacked LSI utilizing the micro interconnections and the layered microthin encapsulationTomita, Y. / Morifuji, T. / Ando, T. / Tago, M. / Kajiwara, R. / Nemoto, Y. / Fujii, T. / Kitayama, Y. / Takahashi, K. et al. | 2001
- 361
-
Stacked thin dice packagingPienimaa, S.K. / Valtanen, J. / Heikkila, R. / Ristolainen, E. et al. | 2001
- 367
-
A Wide Area Vertical Expansion (WAVE/sup TM/) packaging process developmentDelin Li, / Light, D. / Castillo, D. / Beroz, M. / Nguyen, M. / Wang, T. et al. | 2001
- 367
-
A Wide Area Vertical Expansion (WAVETM) packaging process developmentLi, Delin / Light, D. / Castillo, D. / Beroz, M. / Nguyen, M. / Wang, T. et al. | 2001
- 367
-
A Wide Area Vertical Expansion (WAVE™) Packaging Process DevelopmentLi, D. / Light, D. / Castillo, D. / Beroz, M. / Nguyen, M. / Wang, T. / Institute of Electrical and Electronics Engineers et al. | 2001
- 372
-
Solder wetting in a wafer-level flip chip assemblyJicun Lu, / Busch, S.C. / Baldwin, D.F. et al. | 2001
- 378
-
Design and thermo-mechanical analysis of a Dimple-Array Interconnect technique for power semiconductor devicesWen, S.S. / Huff, D. / Guo-Quan Lu, et al. | 2001
- 384
-
Room-temperature interconnection of electroplated Au microbump by means of surface activated bonding methodMatsuzawa, Y. / Itoh, T. / Suga, T. et al. | 2001
- 388
-
Electronics packaging education: NSF and IEEE initiatives and modulesWesling, P. et al. | 2001
- 388
-
Electronics Packaging Education: NSF and IEEE Initiatives, ModulesWesling, P. / Institute of Electrical and Electronics Engineers et al. | 2001
- 392
-
Using an electromagnetic simulation tool for a course on electronics packagingKroger, H. et al. | 2001
- 397
-
A web-based graduate course on the Mechanical Design of High Temperature and High Power ElectronicsMcCluskey, P. et al. | 2001
- 401
-
Electronics packaging-a graduate course for Rutgers University School of Electrical and Computer EngineeringCaggiano, M.F. et al. | 2001
- 405
-
A hands-on multi-disciplinary product development course for micro systems packaging education at Georgia TechBhattacharya, S.K. / Hobbs, J.M. / Varadarajan, M. / Sanchez, O. / Tummala, R.R. / May, G.S. et al. | 2001
- 410
-
Modeling and 3D visualization of laser material processingIllyefalvi-Vitez, Z. / Gordon, P. et al. | 2001
- 416
-
MEMS technology in optical layer networksWalker, J.A. et al. | 2001
- 423
-
MEMS technology-micromachines enabling the "all optical network"Robinson, S.D. et al. | 2001
- 429
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Automated opto-electronic packaging for 10 Gb/s applicationsVerdiell, J.-M. / Webjorn, J. / Kohler, R. / Epitaux, M. / Finot, M. / Kirkpatrick, P. / Lake, R. / Colin, S. / Mader, T. / Bennett, J. et al. | 2001
- 433
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SOA-based optical network componentsRenaud, M. / Keller, D. / Sahri, N. / Silvestre, S. / Prieto, D. / Dorgeuille, F. / Pommereau, F. / Emery, J.Y. / Grard, E. / Mayer, H.P. et al. | 2001
- 439
-
Packaging of optical Fibre Bragg GratingsPsaila, D.C. / Inglis, H.G. et al. | 2001
- 444
-
Optical components and their role in optical networksLebby, M. et al. | 2001
- 448
-
Interfacial reaction studies on lead (Pb)-free solder alloysKang, S.K. / Shih, D.Y. / Fogel, K. / Lauro, P. / Yim, M.J. / Advocate, G. / Griffin, M. / Goldsmith, C. / Henderson, D.W. / Gosselin, T. et al. | 2001
- 455
-
Characterization of lead-free solders and under bump metallurgies for flip-chip packageJong-Kai Lin, / De Silva, A. / Frear, D. / Yifan Guo, / Jin-Wook Jang, / Li Li, / Mitchell, D. / Yeung, B. / Zhang, C. et al. | 2001
- 463
-
Thermal fatigue properties of lead-free solders on Cu and NiP under bump metallurgiesZhang, C. / Jong-Kai Lin, / Li Li, et al. | 2001
- 471
-
Study of the interface microstructure of Sn-Ag-Cu lead-free solders and the effect of solder volume on intermetallic layer formationSalam, B. / Ekere, N.N. / Rajkumar, D. et al. | 2001
- 478
-
Microstructure, joint strength and failure mechanism of Sn-Ag, Sn-Ag-Cu versus Sn-Pb-Ag solders in BGA packagesKa Yau Lee, / Ming Li, / Olsen, D.R. / Chen, W.T. / Tan, B.T.C. / Mhaisalkar, S. et al. | 2001
- 486
-
Fluxless Sn-Bi-Au bonding process using multilayer designChoe, S. / Chuang, R. / Lee, C.C. et al. | 2001
- 489
-
Full wave analysis of planar interconnect structures using FDTD-SPICEOrhanovic, N. / Raghuram, R. / Matsui, N. et al. | 2001
- 495
-
Closed-form representations for triangle impulse responses associated with single and coupled lossy transmission linesTingdong Zhou, / Dvorak, S.L. / Prince, J.L. et al. | 2001
- 503
-
Exploration of a new, efficient approach to modeling and simulation of interconnectsBing Zhong, / Dvorak, S.L. / Prince, J.L. et al. | 2001
- 511
-
Radiative coupling in BGA packaging for mixed-signal and high-speed digitalWoods, W. / Diaz-Alvarez, E. / Krusius, J.P. et al. | 2001
- 518
-
Synthesis of SPICE-compatible broadband electrical models for pins and viasPinello, W. / Morsey, J. / Cangellaris, A. et al. | 2001
- 523
-
Distributed SPICE circuit model for ceramic capacitorsSmith, L.D. / Hockanson, D. et al. | 2001
- 529
-
SoC or SoP? A balanced approach!Davidson, E. et al. | 2001
- 535
-
Process integration for low-cost system on a package (SOP) substrateSundaram, V. / Liu, F. / Dalmia, S. / White, G.E. / Tummala, R.R. et al. | 2001
- 541
-
Development of advanced 3D chip stacking technology with ultra-fine interconnectionTakahashi, K. / Hoshino, M. / Yonemura, H. / Tomisaka, M. / Sunohara, M. / Tanioka, M. / Sato, T. / Kojima, K. / Terao, H. et al. | 2001
- 547
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Development of a high density pixel multichip module at FermilabCardoso, G. / Zimmermann, S. / Kwan, S.W. / Andresen, J. / Appel, J.A. / Cancelo, G. / Christian, D.C. / Cihangir, S. / Downing, R. / Hall, B.K. et al. | 2001
- 552
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Development of 3-dimensional module package, "System Block Module"Imoto, T. / Matsui, M. / Takubo, C. / Akejima, S. / Kariya, T. / Nishikawa, T. / Enomoto, R. et al. | 2001
- 558
-
A study of electromigration in 3D flip chip solder joint using numerical simulation of heat flux and current densityLee, T.-Y.T. / Taek Yeong Lee, / King-Ning Tu, et al. | 2001
- 564
-
Advanced thermal interface materials for enhanced flip chip BGAKohli, P. / Sobczak, M. / Bowin, J. / Matthews, M. et al. | 2001
- 571
-
Self-alignment feasibility study and contact resistance improvement of electrically conductive adhesives (ECAs)Jiali Wu, / Kyoung-Sik Moon, / Wong, C.P. et al. | 2001
- 571
-
Self-Alignment Feasibility Study and Contact Resistance Improvement of Electrically Conductive AdhesivesWu, J. / Moon, K.-S. / Wong, C. P. / Institute of Electrical and Electronics Engineers et al. | 2001
- 576
-
Solder alternative: contact resistance improvements for SMCAs. IIFredrickson, G. / Chih-Min Cheng, et al. | 2001
- 580
-
Characterization of anisotropic conducting adhesive used as a flex-to-card interconnectionPrabhakumar, A. / Constable, J.H. et al. | 2001
- 586
-
Development of thermoplastic isotropically conductive adhesiveLiong, S. / Wong, C.P. et al. | 2001
- 593
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Microwave cure of metal-filled electrically conductive adhesiveTiebing Wang, / Ying Fu, / Becker, M. / Liu, J. et al. | 2001
- 598
-
Reliability study and failure analysis of fine pitch solder bumped flip chip on low-cost printed circuit board substrateGuo-Wei Xiao, / Chan, P.C.H. / Teng, A. / Lee, P.S.W. / Yuen, M.M.F. et al. | 2001
- 606
-
Mechanical bending fatigue reliability and its application to area array packagingSkipor, A. / Leicht, L. et al. | 2001
- 613
-
Selection of base substrate material for design against interfacial delamination for a multilayered system-on-package (SOP) structureWeidong Xie, / Hurang Hu, / Sitaraman, S.K. et al. | 2001
- 620
-
Fracture mechanics analysis of the effect of geometry on delaminations in rectangular IC packagesTay, A.A.O. / Zhu, H. et al. | 2001
- 620
-
Fracture Mechanics Analysis of the Effect on Delaminations in Rectangular IC PackagesTay, A. A. O. / Zhu, H. / Institute of Electrical and Electronics Engineers et al. | 2001
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-
Buckling driven interface delamination between a thin metal layer and a ceramic substrateLiu, C.J. / Zhang, G.Q. / Ernst, L.J. / Vervoort, M. / Wisse, G. et al. | 2001
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Wavelength stability of DFB lasers for non-hermetic applicationsTheis, C. / Jongwoo Park, / Kiely, P. / Tohmon, G. / Ping Wu, / Chakrabarti, U. / Osenbach, J. et al. | 2001
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Epoxy adhesive used in optical fiber/passive component: kinetics, voids and reliabilityJongwoo Park, / Taweeplengsangsuke, J. / Theis, C. / Osenbach, J. et al. | 2001
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Electromagnetic shielding of plastic material in laser diode modulesChiu, S.K. / Cheng, J.Y. / Jou, W.S. / Jong, G.J. / Wang, S.C. / Wang, C.M. / Lin, C.S. / Wu, T.L. / Cheng, W.H. et al. | 2001
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A new type of package incorporating a thin AlN heater for planar lightwave circuit devicesSaito, I. / Nagai, M. / Hirose, Y. / Tatoh, N. / Seki, M. / Saitou, M. / Tomikawa, T. / Yamanaka, S. et al. | 2001
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A New Type of Package Incorporating a Thin AIN Heater for Planar Lightwave Circuit DevicesSaito, H. / Nagai, M. / Hirose, Y. / Tatoh, N. / Seki, M. / Saitou, M. / Tomikawa, T. / Yamanaka, S. / Institute of Electrical and Electronics Engineers et al. | 2001
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Low loss deep glass waveguides produced with dry silver electromigration processChuang, R.W. / Lee, C.C. et al. | 2001
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High-performance polymers for optical interconnect applications at 3MWalker, C.B. / Kling, J.A. / Lee, N.A. / Novack, J. / Watson, J.E. et al. | 2001
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Development of a lead free chip scale package for wireless applicationsKripesh, V. / Poi-Siong Teo, / Tai, C.T. / Vishwanadam, G. / Yew Cheong Mui, et al. | 2001
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A fluxless Sn-In bonding process achieving high remelting temperatureChuang, R.W. / Choe, S. / Lee, C.C. et al. | 2001
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Lead free interfacial structures and their relationship to Au plating including accelerated thermal cycle testing of non-leaden BGA spheresTaguchi, T. / Kato, R. / Akita, S. / Okuno, A. / Suzuki, H. / Okuno, T. et al. | 2001
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Deformation and crack growth characteristics of SnAgCu vs 63Sn/Pb solder joints on a WLP in thermal cycle testingDeok-Hoon Kim, / Elenius, P. et al. | 2001
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The kinetics of formation of ternary intermetallic alloys in Pb-Sn and Cu-Ag-Sn Pb-free electronic jointsZribi, A. / Zavalij, L. / Borgesen, P. / Primavera, A. / Westby, G. / Cotts, E.J. et al. | 2001
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Intermetallic reactions between lead-free SnAgCu solder and Ni(P)/Au surface finish on PWBsZeng, K. / Vuorinen, V. / Kivilahti, J.K. et al. | 2001
- 699
-
A study of normal, restoring, and fillet forces and solder bump geometry during reflow in concurrent underfill/reflow flip chip assemblyRenzhe Zhao, / Yun Zhang, / Johnson, R.W. / Harris, D.K. et al. | 2001
- 704
-
Stress analysis and design optimization of a wafer-level CSP by FEM simulations and experimentsRzepka, S. / Hofer, E. / Simon, J. / Meusel, E. / Reichl, H. et al. | 2001
- 715
-
Simulation and measurement of thermal stress in quasi-monolithic integration technology (QMIT)Joodaki, M. / Kompa, G. / Leinhos, T. / Kassing, R. / Hillmer, H. et al. | 2001
- 721
-
Coupled thermal electric-modeling of flexible nanospring interconnects for high-performance probingAhmad, M. / Sitaraman, S.K. et al. | 2001
- 730
-
Thermal characterization of bare-die stacked modules with Cu through-viasYamaji, Y. / Ando, T. / Morifuji, T. / Tomisaka, M. / Sunohara, M. / Sato, T. / Takahashi, K. et al. | 2001
- 738
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Parametric Studies of the Thermal Performance of Back-to-Back Tape Bill Grid Array (TBGA) PackagesTonapi, S. S. / Sathe, S. B. / Sammakia, B. G. / Srihari, K. / Institute of Electrical and Electronics Engineers et al. | 2001
- 738
-
Parametric studies of the thermal performance of back-to-back tape ball grid array (TBGA) packagesTonapi, S.S. / Sathe, S.B. / Sammakia, B.G. / Srihari, K. et al. | 2001
- 744
-
50 GHz broadband SMT package for microwave applicationsYoshida, K. / Shirasaki, T. / Matsuzono, S. / Makihara, C. et al. | 2001
- 750
-
A pressure sensor using flip-chip on low-cost flexible substrateGuo-Wei Xiao, / Chan, P.C.H. / Teng, A. / Jian Cai, / Yuen, M.M.F. et al. | 2001
- 755
-
Room-temperature direct bonding of CMP-Cu film for bumpless interconnectionShigetou, A. / Hosoda, N. / Itoh, T. / Suga, T. et al. | 2001
- 761
-
Compliant cantilevered spring interconnects for flip-chip packagingLunyu Ma, / Qi Zhu, / Sitaraman, S.K. / Chua, C. / Fork, D.K. et al. | 2001
- 767
-
Ultra thin electronics for space applicationsVendier, O. / Huan, M. / Drevofi, C. / Cazaux, J.L. / Beyne, E. / Van Hoof, R. / Marty, A. / Pinel, S. / Tasselli, J. / Marco, S. et al. | 2001
- 772
-
2 metal layer tape package for improving the performance of high speed DRAMTae-Sub Chang, / Dong-Ho Lee, / Jung-Jin Kim, / Mee-Hyun Ahn, et al. | 2001
- 777
-
A practical, flip-chip, multi-layer pre-encapsulation technology for wafer-scale underfillBurress, R.V. / Capote, M.A. / Yong-Joon Lee, / Lenos, H.A. / Zamora, J.F. et al. | 2001
- 782
-
Flip chip assembly process development, reliability assessment and process characterization for polymer stud grid array-chip scale packagePaydenkar, C.S. / Jefferson, F.G. / Baldwin, D.F. et al. | 2001
- 790
-
Investigation of Low Cost Flip Chip Under Bump Metallization (UBM) Systems on Cu PadsNah, J.-W. / Paik, K.-W. / Institute of Electrical and Electronics Engineers et al. | 2001
- 790
-
Investigation of low cost flip chip under bump metailization (UBM) systems on Cu padsJae-Woong Nab, / Kyung-Wook Paik, et al. | 2001
- 796
-
Adhesion/reliability/reworkability study on underfill material from free radical polymerization system and its hybrid composite with epoxy resinLianhua Fan, / Wong, C.P. et al. | 2001
- 803
-
Assessment of flip chip assembly and reliability via reflowable underfillTie Wang, / Chew, T.H. / Lum, C. / Chew, Y.X. / Miao, P. / Foo, L. et al. | 2001
- 810
-
Processing design rules for reliable reflowable underfill applicationKallmayer, C. / Becker, K.-F. / Jung, E. / Aschenbrenner, R. / Reichl, H. et al. | 2001
- 816
-
Modeling RF passive circuits using coupled lines and scalable modelsDalmia, S. / Sung Hwan Min, / Swaminathan, M. et al. | 2001
- 824
-
Experimental analysis of design options for spiral inductors integrated on low cost MCM-D substratesCottet, D. / Grzyb, J. / Scheffler, M. / Troster, G. et al. | 2001
- 831
-
Parameterized models for a RF chip-to-substrate interconnectDoerr, I. / Lih-Tyng Hwang, / Sommer, G. / Oppermann, H. / Li, L. / Petras, M. / Korf, S. / Sahli, F. / Myers, T. / Miller, M. et al. | 2001
- 839
-
New structure 1608 size chip tantalum capacitor -6.3 WV-10 /spl mu/F with face-down terminals for fillet-less surface mountingShirashige, M. / Oka, K. / Okada, K. et al. | 2001
- 839
-
New Structure 1608 Size Chip Tantalum Capacitor - 6.3WV 10muF - with Face-Down Terminals for Fillet-less Surface MountingShirashige, M. / Oka, K. / Okada, K. / Institute of Electrical and Electronics Engineers et al. | 2001
- 847
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Embedded TiNxOy thin-film resistors in a build-up CSP for 10 Gbps optical transmitter and receiver modulesShibuya, A. / Matsui, K. / Takahashi, K. / Kawatani, A. et al. | 2001
- 852
-
Simulation, modeling, and testing embedded RF capacitors in low temperature cofired ceramicBlood, W. / Feng Ling, / Kamgaing, T. / Myers, T. / Petras, M. et al. | 2001
- 858
-
Advances in long-wavelength single-mode VCSELs and packaging approaches for single-mode fiber applicationsColdren, L.A. / Hall, E. / Nakagawa, S. et al. | 2001
- 864
-
Heterogeneous integration of OE arrays with Si electronics and micro-opticsYue Liu, et al. | 2001
- 870
-
SMT-compatible optical-I/O chip packaging for chip-level optical interconnectsIshii, Y. / Koike, S. / Arai, Y. / Ando, Y. et al. | 2001
- 876
-
Microlens arrays with integrated thin film power monitorsEugene Ma, / Payne, A. / Nemchuk, N. / Domash, L. et al. | 2001
- 880
-
Multi-channel optical interconnection modules up to 2.5 Gb/s/chEichenberger, J. / Toyoda, S. / Takezawa, N. / Keller, C. / Sugiyama, M. / Iwasaki, Y. et al. | 2001
- 886
-
Device processing technology for free-space optical interconnect systemOren, M. / McCarthy, A. / Tooley, F. / Laprise, A.E. / Plant, D. / Kirk, A. / Lu, Y. / Zhao, J. et al. | 2001
- 890
-
Constitutive behaviour of lead-free solders vs. lead-containing solders-experiments on bulk specimens and flip-chip jointsWiese, S. / Schubert, A. / Walter, H. / Dukek, R. / Feustel, F. / Meusel, E. / Michel, B. et al. | 2001
- 890
-
Constitutive Behavior of Lead-Free Solders v.s. Lead-Containing Solders - Experiments on Bulk Specimens and Flip-Chip JointsWiese, S. / Schubert, A. / Walter, H. / Dudek, R. / Feustel, F. / Meusel, E. / Michel, B. / Institute of Electrical and Electronics Engineers et al. | 2001
- 903
-
Mold delamination and die fracture analysis of mechatronic packagesMercado, L.L. / Wieser, H. / Hauck, T. et al. | 2001
- 911
-
Sensitivity derivatives of dissimilar material junctions in electronic packagesGuven, I. / Barut, A. / Madenci, E. et al. | 2001
- 919
-
Combined experimental and numerical investigation on flip chip solder fatigue with cure-dependent underfill propertiesYang, D.G. / Zhang, G.Q. / Ernst, L.J. / Caers, J.F.J. / Bressers, H.J.L. / Janssen, J. et al. | 2001
- 925
-
Evaluation and optimization of package processing, design, and reliability through solder joint profile predictionYeung, B.H. / Lee, T.-Y.T. et al. | 2001
- 931
-
Creep behavior of a molding compound and its effect on packaging process stressesKiasat, M.S. / Zhang, G.Q. / Ernst, L.J. / Wisse, G. et al. | 2001
- 933
-
Studies on a novel flip-chip interconnect structure - pillar bumpTie Wang, / Tung, F. / Foo, L. / Dutta, V. et al. | 2001
- 939
-
Cr/Cu/Ni underbump metallization studyTay Hui Leng, / Galen Kirkpatrick, / Andrew Tay, / Lu Li, et al. | 2001
- 950
-
Investigation of UBM systems for electroplated Sn/37Pb and Sn/3.5Ag solderSe-Young Jang, / Wolf, J. / Ehrmann, O. / Gloor, H. / Reichl, H. / Kyung-Wook Paik, et al. | 2001
- 957
-
Micro-ball wafer bumping for flip chip interconnectionHashino, E. / Shimokawa, K. / Yamamoto, Y. / Tatsumi, K. et al. | 2001
- 965
-
Interfacial adhesion study for copper/SiLK interconnects in flip-chip packagesMiller, M.R. / Ho, P.S. et al. | 2001
- 971
-
Thermo-electromigration phenomenon of solder bump, leading to flip-chip devices with 5,000 bumpsNakagawa, K. / Baba, S. / Watanabe, M. / Matsushima, H. / Harada, K. / Hayashi, E. / Wu, Q. / Maeda, A. / Nakanishi, M. / Ueda, N. et al. | 2001
- 978
-
Evaluation of lead(Pb)-free ceramic ball grid array (CBGA): Wettability, microstructure and reliabilityFarooq, M. / Ray, S. / Sarkhel, A. / Goldsmith, C. et al. | 2001
- 987
-
High speed multichip modules using flip chip mount technology for 10 Gbps optical transmission systemsTakahashi, K. / Ikeuchi, T. / Tsuda, T. / Chuzenji, T. et al. | 2001
- 993
-
Improved grounding method for heat sinks of high speed processorsDiepenbrock, J.C. / Archambeault, B. / Hobgood, L.D. et al. | 2001
- 997
-
High performance flip chip PBGA developmentStone, B. / Czarnowski, J.M. / Guajardo, J.R. et al. | 2001
- 1003
-
Bump-less interconnect for next generation system packagingSuga, T. / Otsuka, K. et al. | 2001
- 1009
-
Flip chip in leaded molded package (FLMP)Joshi, R. / Manatad, R. / Tangpuz, C. et al. | 2001
- 1013
-
A new wafer-bonder of ultra-high precision using surface activated bonding (SAB) conceptSuga, T. / Howlader, M.M.R. / Itoh, T. / Inaka, C. / Arai, Y. / Yamauchi, A. et al. | 2001
- 1019
-
Electrical test strategies for a wafer-level batch packaging technologyKeezer, D.C. / Patel, C.S. / Zhou, Q. / Meindl, J.D. et al. | 2001
- 1024
-
Flip chip interconnection method applied to small camera moduleKarasawa, J. / Segawa, M. / Kishimoto, Y. / Aoki, M. / Sasaki, T. et al. | 2001
- 1029
-
Time for change in pre-assembly? The challenge of thin chipsKroninger, W.J. / Hecht, F. / Lang, G. / Mariani, F. / Geyer, S. / Schneider, L. et al. | 2001
- 1034
-
Innovative packaging concepts for ultra thin integrated circuitsKlink, G. / Feil, M. / Ansorge, F. / Aschenbrenner, R. / Reichl, H. et al. | 2001
- 1040
-
Development of gold to gold interconnection flip chip bonding for chip on suspension assembliesLuk, C.F. / Chan, Y.C. / Hung, K.C. et al. | 2001
- 1045
-
Underfilled BGAs for a variety of plastic BGA package types and the impact on board-level reliabilityBurnette, T. / Johnson, Z. / Koschmieder, T. / Oyler, W. et al. | 2001
- 1052
-
The Comparison of Solder Joint Reliability Between BCC++ and MCCHung, S. C. / Zheng, P. J. / Ho, S. H. / Lee, S. C. / Wu, J. D. / Institute of Electrical and Electronics Engineers et al. | 2001
- 1052
-
The comparison of solder joint reliability between BCC++ and QFNHung, S.C. / Zheng, P.J. / Ho, S.H. / Lee, S.C. / Wu, J.D. et al. | 2001
- 1059
-
Solder joint crack propagation in plastic and ceramic packaged diodes mounted on insulated metal substrateSangalli, N. / Barker, D.B. et al. | 2001
- 1065
-
Characterization and Analysis on the Solder Bail Shear Testing ConditionsHuang, X. / Lee, S.-W. R. / Yan, C. C. / Hui, S. / Institute of Electrical and Electronics Engineers et al. | 2001
- 1065
-
Characterization and analysis on the solder ball shear testing conditionsXingjia Huang, / Lee, S.-W.R. / Chien Chun Yan, / Hui, S. et al. | 2001
- 1072
-
The effect of variations in nickel/gold surface finish on the assembly quality and attachment reliability of a plastic ball grid arrayCoyle, R.J. / Wenger, G.M. / Hodges, D.E. / Mawer, A. / Cullen, D.P. / Solan, P.P. et al. | 2001
- 1081
-
An experimental study of failure and fatigue life of a stacked CSP subjected to cyclic bendingWu, J.D. / Ho, S.H. / Zheng, P.J. / Liao, C.C. / Hung, S.C. et al. | 2001
- 1087
-
Comparison of multilayer organic and ceramic package simultaneous switching noise measurements using a 0.16 /spl mu/m CMOS test chipBudell, T. / Audet, J. / Kent, D. / Libous, J. / O'Connor, D. / Rosser, S. / Tremble, E. et al. | 2001
- 1087
-
Comparison of Multilayer Organic and Ceramic Package Simultaneous Switching Noise Measurements using a 0.16-mum CMOS Test ChipBudell, T. / Audet, J. / Kent, D. / Libous, J. / O Connor, D. / Rosser, S. / Tremble, E. / Institute of Electrical and Electronics Engineers et al. | 2001
- 1095
-
Modeling and simulation of core switching noise on a package and boardNa, N. / Swaminathan, M. / Libous, J. / O'Connor, D. et al. | 2001
- 1102
-
A simulation study of simultaneous switching noiseChen, C.-T. / Zhao, J. / Chen, Q. et al. | 2001
- 1107
-
Integrated modeling methodology for core and I/O power deliveryRadhakrishnan, K. / Li, Y.-L. / Pinello, W.P. et al. | 2001
- 1111
-
A quasi three-dimensional distributed electromagnetic model for complex power distribution networksChoi, M.J. / Cangellaris, A.C. et al. | 2001
- 1117
-
The impact of split power planes on package performanceMiller, J.R. et al. | 2001
- 1122
-
A comparison of large I/O flip chip and wire bonded packagesBulumulla, S.B. / Caggiano, M.F. / Lischner, D.J. / Wolf, R.K. et al. | 2001
- 1127
-
High density packaging for mobile terminalsPienimaa, S.K. / Martin, N.I. et al. | 2001
- 1127
-
High Density Packaging for Mobile TenninalsPienimaa, S. K. / Martin, N. I. / Institute of Electrical and Electronics Engineers et al. | 2001
- 1135
-
Flip chip with lead-free solders on halogen-free microvia substratesBaynham, G. / Baldwin, D.F. / Boustedt, K. / Wennerholm, C. et al. | 2001
- 1140
-
Low cost flip chip package design concepts for high density I/OTee-Onn Chong, / Seng-Hooi Ong, / Teong-Guan Yew, / Chee-Yee Chung, / Sankman, R. et al. | 2001
- 1144
-
Improvement of the reliability of the C4 for ultrahigh thermal conduction module with the direct solder-attached cooling system (DiSAC)Yamada, O. / Sawada, Y. / Harada, M. / Yokozuka, T. / Yasukawa, A. / Moriya, H. / Saito, N. / Kasai, K. / Uda, T. / Netsu, T. et al. | 2001
- 1149
-
Dual operational amplifier using flip-chip fine package of 1.0/spl times/1.0/spl times/0.6-mm with 8-pin countsKurata, H. / Mitsuka, K. / Matsushita, H. et al. | 2001
- 1149
-
Dual Operational Amplifier Using Flip-Chip Fine Package of 1.0x1.0x0.6mm with 8-Pin CountsKurata, H. / Mitsuka, K. / Matsushita, H. / Institute of Electrical and Electronics Engineers et al. | 2001
- 1154
-
Reliability study for CTE mismatching in build-up structureNawa, K. et al. | 2001
- 1159
-
Reliability assessment of microvias in HDI printed circuit boardsFuhan Liu, / Jicun Lu, / Sundaram, V. / Sutter, D. / White, G. / Baldwin, D. / Tummala, R.R. et al. | 2001
- 1164
-
Global/local modeling for PWB mechanical loadingJiansen Zhu, / Quander, S. / Reinikainen, T. et al. | 2001
- 1170
-
Effect of thermal cycling ramp rate on CSP assembly reliabilityGhaffarian, R. et al. | 2001
- 1175
-
Effects of probe damage on wire bond integrityHotchkiss, G. / Ryan, G. / Subido, W. / Broz, J. / Mitchell, S. / Rincon, R. / Rolda, R. / Guimbaolibot, L. et al. | 2001
- 1181
-
Novel Thermal Validation Metrology Based on Non-Uniform Power Distribution for Pentium® III Xeon™ Cartridge Processor Design with Integrated Level Two CacheGoh, T. J. / Amir, A. N. / Chiu, C.-P. / Torresola, J. / Institute of Electrical and Electronics Engineers et al. | 2001
- 1181
-
Novel thermal validation metrology based on non-uniform power distribution for Pentium(R) III Xeon/sup TM/ cartridge processor design with integrated level two cacheTeck Joo Goh, / Amir, A.N. / Chia-Pin Chiu, / Torresola, J. et al. | 2001
- 1187
-
Evaluation of Cu capping alternatives for polyimide-Cu MCM-DPerfecto, E. / Kang-Wook Lee, / Hamel, H. / Wassick, T. / Cline, C. / Oonk, M. / Feger, C. / McHerron, D. et al. | 2001
- 1193
-
Selection and evaluation of materials for future system-on-package (SOP) substrateMarkondeya Raj, P. / Shinotani, K. / Mancheol Seo, / Bhattacharya, S. / Sundaram, V. / Zama, S. / Jicun Lu, / Zweben, C. / White, G.E. / Tummala, R.R. et al. | 2001
- 1198
-
Processing and properties of new soluble polyimidesEzzell, S.A. / Bai, F. / Chien, B. / Givot, B.L. / Ayukawa, H. / Kobayashi, M. / Aoki, S. et al. | 2001
- 1201
-
Processing of polymer-ceramic nanocomposites for system-on-package applicationsWindlass, H. / Markondeya Raj, P. / Balaraman, D. / Bhattacharya, S.K. / Tummala, R.R. et al. | 2001
- 1207
-
Effects of microvia build-up layers on the solder joint reliability of a wafer level chip scale package (WLCSP)Lau, J.H. / Lee, S.-W.R. et al. | 2001
- 1216
-
Effects of O/sub 2//C/sub 2/F/sub 6/ plasma descum with RF cleaning on via formation in MCM-D substrate using photosensitive BCBChul-Won Ju, / Seong-Su Park, / Seong-Jin Kim, / Kyu-Ha Pack, / Hee-Tae Lee, / Min-Kyu Song, et al. | 2001
- 1216
-
Effects of O~2/C~2F~6 Plasma Descum with RF Cleaning on Via Formation in MCM-D Substrate Using Photosensitive BCBJu, C.-W. / Park, S.-S. / Kim, S.-J. / Pack, K.-H. / Lee, H.-T. / Song, M.-K. / Institute of Electrical and Electronics Engineers et al. | 2001
- 1219
-
Solder joint attachment reliability and assembly quality of a molded ball grid array socketCoyle, R.J. / Holliday, A. / Solan, P.P. / Yao, C. / Cyker, H.A. / Manock, J.C. / Bond, R. / Stenerson, R.E. / Furrow, R.G. / Occhipinti, M.V. et al. | 2001
- 1227
-
A new coiled microspring contact technologyMarcus, R.B. et al. | 2001
- 1233
-
BGA backplane connector for high speed differential signalsOlson, S.W. et al. | 2001
- 1239
-
AMP Z-pack 2 mm HM connectors with quiet mate contacts for resolution of nanosecond discontinuity in hot-swap applicationsDemirci, H.H. / Laub, M. / Fry, C. et al. | 2001
- 1245
-
Electrical modeling of high speed interconnection linksDe Geest, J. / Sercu, S. / Nadolny, J. et al. | 2001
- 1250
-
High frequency measurement of isotropically conductive adhesivesLiong, S. / Zhuqing Zhang, / Wong, C.P. et al. | 2001
- 1255
-
SensEdu-an Internet course for teaching sensoricsHarsanyi, G. / Lepsenyi, I. / Gordon, P. / Bojta, P. / Ballun, G. / Illyefalvi-Vitez, Z. et al. | 2001
- 1261
-
Progress on Internet-based educational material development for electronic products and systems cost analysisSandborn, P. / Murphy, C.F. et al. | 2001
- 1267
-
Progress on developing electronic packaging educational modulesKim, B.C. / Severance, C. et al. | 2001
- 1270
-
Development of an Internet course on electrically conductive adhesives with experimentsJohan Liu, / Xitao Wang, / Morris, J.E. et al. | 2001
- 1276
-
Undergraduate microsystems packaging education: needs, status and challengesTummala, R. / Conrad, L. et al. | 2001