A 39-46 GHz MMIC HBT Triple-Push VCO Using Cascode Configuration (English)
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In:
IEEE Asia-Pacific conference on ASICs
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61-64
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2002
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ISBN:
- Conference paper / Print
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Title:A 39-46 GHz MMIC HBT Triple-Push VCO Using Cascode Configuration
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Contributors:Chen, P.-Y. ( author ) / Tang, Y.-L. ( author ) / Wang, H. ( author ) / Wang, Y.-C. ( author ) / Chao, P.-C. ( author ) / Chen, C.-H. ( author ) / IEEE
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Conference:3rd, IEEE Asia-Pacific conference on ASICs ; 2002 ; Taipei, Taiwan
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Published in:
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Publisher:
- New search for: IEEE
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Publication date:2002-01-01
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Size:4 pages
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Remarks:IEEE cat no 00EX547. Also known as AP-ASIC 2002
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ISBN:
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Type of media:Conference paper
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Type of material:Print
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Language:English
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Keywords:
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Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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A 0.8 V Switched-opamp Bandpass DeltaSigma Modulator Using a Two-path ArchitectureChang, H.-H. / Chen, S.-P. / Cheng, K.-W. / Liu, S.-I. / IEEE et al. | 2002
- 1
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A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architectureHsiang-Hui Chang, / Shang-Ping Chen, / Kuang-Wei Cheng, / Shen-Iuan Liu, et al. | 2002
- 5
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Transfer function design of stable high-order sigma-delta modulators with root locus inside unit circleCheng-Chung Yang, / Kuan-Dar Chen, / Wen-Chyi Wang, / Tai-Haur Kuo, et al. | 2002
- 9
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A low-distortion and swing-suppression sigma-delta modulator with extended dynamic rangeJen-Shiun Chiang, / Teng-Hung Chang, / Pou-Chu Chou, et al. | 2002
- 13
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A CMOS current-mode band-pass filter with small chip areaMaruyama, Y. / Hyogo, A. / Sekine, K. et al. | 2002
- 17
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Analog circuit for sound localization applicationsTiwary, S.K. / Diamond, B. / Okerholm, A. et al. | 2002
- 21
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A new low-voltage CMOS 1-bit full adder for high performance applicationsI-Chyn Wey, / Chun-Hua Huang, / Hwang-Cherng Chow, et al. | 2002
- 25
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Fast and compact dynamic ripple carry adder designChih-Jen Fang, / Chung-Hsun Huang, / Jinn-Shyan Wang, / Ching-Wei Yeh, et al. | 2002
- 29
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A novel self-repairable parallel multiplier architecture, design and testRong Lin, / Margala, M. / Kazakova, N. et al. | 2002
- 33
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A new pipelined divider with a small lookup tableJong-Chul Jeong, / Woong Jeong, / Hyun-Jae Woo, / Seung-Ho Kwak, / Woo-Chan Park, / Moon-Key Lee, / Tak-don Han, et al. | 2002
- 37
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Implementation of high performance buffer manager for an advanced input-queued switch fabricGab Joong Jeong, / Jung-Hee Lee, / Bhum-Cheol Lee, et al. | 2002
- 41
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Structure configuration of low power register file using energy modelXue-mei Zhao, / Yi-zheng Ye, et al. | 2002
- 45
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A selectively accessing TLB for high performance and lower power consumptionJung-Hi Min, / Jung-Hoon Lee, / Seh-Woong Jeong, / Shin-Dug Kim, et al. | 2002
- 49
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A 4-Kb 500-MHz 4-T CMOS SRAM Using Low-V~t~h~n Bitline Drivers and High-V~t~h~p LatchesWang, C.-C. / Leo, H.-Y. / Hu, R. / IEEE et al. | 2002
- 49
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A 4-KB 500-MHz 4-T CMOS SRAM using low-V/sub THN/ bitline drivers and high-V/sub THP/ latchesChua-Chin Wang, / Hon-Yuan Leo, / Hu, R. et al. | 2002
- 53
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A new 4-phase charge pump without body effects for low supply voltagesHongchin Lin, / JainHao Lu, / Yen-Tai Lin, et al. | 2002
- 57
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Self-isolated gain-enhanced sense amplifierHong-Yi Huang, / Shih-Lun Chen, et al. | 2002
- 61
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A 39-46 GHz MMIC HBT triple-push VCO using cascode configurationPo-Yo Chen, / Yu-Lung Tang, / Huei Wang, / Yu-Chi Wang, / Pane-Chane Chao, / Chung-Hsu Chen, et al. | 2002
- 65
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A 2.5 Gbps CMOS laser diode driver with preemphasis techniqueGuo-Cheng Chen, / Wei-Zen Chen, / Ren-Hong Luo, et al. | 2002
- 65
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A 2.5 Gbps CMOS Laser Diode Driver with Preamphasis TechniqueChen, G.-C. / Chen, W.-Z. / Luo, R.-H. / IEEE et al. | 2002
- 69
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A 5.5 GHz prescaler in 0.18 /spl mu/m CMOS technologyAjjikuttira, A.B. / Wei Liat Chan, / Yong Lian, et al. | 2002
- 69
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A 5.5-GHz Prescaler in 0.18-mum CMOS TechnologyAjjikuttira, A. B. / Chan, W. L. / Lian, Y. / IEEE et al. | 2002
- 73
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A 2.5 Gbps CMOS data serializerMeng-Tzer Wong, / Wei-Zen Chen, et al. | 2002
- 77
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2.5 Gbps CMOS laser diode driver with APC and digitally controlled current modulationChih-Hsien Lin, / I-Chen Yao, / Chun-Cheng Kuo, / Shyh-Jye Jou, et al. | 2002
- 81
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A novel systolic VLSI architecture for fast RSA modular multiplicationMin-Sup Kang, / Kurdahi, F.J. et al. | 2002
- 85
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A high-throughput low-cost AES cipher chipTsung-Fu Lin, / Chih-Pin Su, / Chih-Tsun Huang, / Cheng-Wen Wu, et al. | 2002
- 89
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A Rijndael cryptoprocessor using shared on-the-fly key schedulerJoon Hyoung Shim, / Dae Won Kim, / Young Kyu Kang, / Taek Won Kwon, / Jun Rim Choi, et al. | 2002
- 93
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An efficient implementation of hash function processor for IPSECYong kyu Kang, / Dae Won Kim, / Taek Won Kwon, / Jun Rim Choi, et al. | 2002
- 97
-
A staged carry-save-adder array for Montgomery modular multiplicationJhing-Fa Wang, / Po-Chuan Lin, / Ping-Kun Chiu, et al. | 2002
- 101
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Tunable injection current compensation architecture for high fill-factor self-buffered active pixel sensorHsien-Chun Chang, / Ya-Chin King, et al. | 2002
- 105
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A novel logarithmic response CMOS image sensor with high output voltage swing and in-pixel fixed pattern noise reductionLiang-Wei Lai, / Ya-Chin King, et al. | 2002
- 109
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A cross-check test scheme for infrared focal plane arrayMeng Lieh Sheu, / Mon Chao Shie, / Tai Ping Sun, / Far Wen Jih, et al. | 2002
- 113
-
High Q broadband copper spiral inductors with Q=45 on proton-bombarded semi-insulating silicon substrateHeng-Ming Hsu, / Jiong-Guang Su, / Yo-Sheng Lin, / Ming-Hao Tseng, / Jason Chih-Hsien Lin, / Jack Yuan-Chen Sun, / Denny Tang, / Tsing-Tyan Yang, / Ting-Sien Tu, / Li-Fu Lin, et al. | 2002
- 117
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A 2.4 GHz Bluetooth transceiver in 0.18 /spl mu/m CMOSBang-Sup Song, / Leung, V. / Cho, T. / Kang, D. / Dow, S. et al. | 2002
- 117
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Invited Paper A 2.4 GHz Bluetooth Transceiver in 0.18mum CMOSSong, B.-S. / Leung, V. / Cho, T. / Kang, D. / Dow, S. / IEEE et al. | 2002
- 121
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A programmable filter with self-tuning for DMT VDSL receiverChia-Hua Chou, / Chien-Chih Lin, / Chorng-Kuang Wang, et al. | 2002
- 125
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A dual-loop automatic gain control for infrared communication systemChien-Chih Lin, / Muh-Tain Shieu, / Chorng-Kuang Wang, et al. | 2002
- 129
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A low power CMOS adaptive line equalizer for fast EthernetKwisung Yoo, / Hoon Lee, / Gunhee Han, et al. | 2002
- 133
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A CMOS low-IF programmable gain amplifier with speed-enhanced DC offset cancellationChao-Shiun Wang, / Po-Chiun Huang, et al. | 2002
- 137
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Explicit transfer function of RC polyphase filter for wireless transceiver analog front-endKobayashi, H. / Kang, J. / Kitahara, T. / Takigami, S. / Sadamura, H. et al. | 2002
- 141
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Spread-spectrum clocking in switching regulators to reduce EMISadamura, H. / Daimon, T. / Shindo, T. / Kobayashi, H. / Myono, T. / Suzuki, T. / Kawai, S. / Iijima, T. et al. | 2002
- 145
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Design of Negative Charge Pump Circuit with Polysilicon Diodes in a 0.25-um CMOS ProcessKer, M.-D. / Chang, C.-Y. / Jiang, H.-C. / IEEE et al. | 2002
- 145
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Design of negative charge pump circuit with polysilicon diodes in a 0.25 /spl mu/m CMOS processMing-Dou Ker, / Chyh-Yih Chang, / Hsin-Chin Jiang, et al. | 2002
- 149
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System-level requirements of DC-DC converters for dynamic power supplies of power amplifiersSahu, B. / Rincon-Mora, G.A. et al. | 2002
- 153
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A comprehensive power analysis and a highly efficient, mode-hopping DC-DC converterGildersleeve, M. / Forghani-zadeh, H.P. / Rincon-Mora, G.A. et al. | 2002
- 157
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High-speed class AB buffer amplifiers with accurate quiescent current controlChih-Wen Lu, / Meng-Lieh Sheu, et al. | 2002
- 161
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A high performance class AB CMOS rail to rail voltage followerBoonyaporn, P. / Kasemsuwan, V. et al. | 2002
- 165
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A track-and-hold circuit using a tail current source dividing techniqueSuzuki, K. / Fujii, N. / Takagi, S. et al. | 2002
- 169
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A 33 mW 12-bit 100 MHz sample-and-hold amplifierCheng-Chung Hsu, / Jieh-Tsorng Wu, et al. | 2002
- 173
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A 3.3 V-110 MHz 10-bit CMOS current-mode DACSung Yong Park, / Hyun Ho Cho, / Kwang Sub Yoon, et al. | 2002
- 177
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A two-step A/D converter in digital CMOS processesTzu-Chao Lin, / Jiin-Chuan Wu, et al. | 2002
- 181
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A 1 V CMOS analog comparator using auto-zero and complementary differential-input techniqueYu-Cherng Hung, / Bin-Da Liu, et al. | 2002
- 185
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High performance 1 V 2.4 GHz CMOS VCOTroedsson, N. / Sjoland, H. et al. | 2002
- 189
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Phase noise analysis of an integrated voltage-controlled oscillator with a novel graphical optimization methodMing-Chun Su, / Chia-Wei Wu, / Klaus Yung-Jane Hsu, et al. | 2002
- 193
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Two MOSFET-C low-voltage fully differential voltage-controlled oscillators for frequency tuningTsung-Sum Lee, / Tai-Hua Chen, et al. | 2002
- 197
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The CMOS on-chip oscillator based on level tracking techniqueChia-Yang Chang, / Po-Chang Chen, / Ching-Yang Yang, / Yang-Han Lee, et al. | 2002
- 201
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Voltage controlled ring oscillator with wide tuning range and fast voltage swingRetdian, N. / Takagi, S. / Fujii, N. et al. | 2002
- 205
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A 64 bit parallel CMOS adder for high performance processorsSun Xu-guang, / Mao Zhi-gang, / Lai Feng-chang, et al. | 2002
- 209
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Reusable embedded debugger for 32 bit RISC processor using the JTAG boundary scan architectureDae-Young Jung, / Sung-Ho Kwak, / Moon-Key Lee, et al. | 2002
- 213
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An 8-way VLIW embedded multimedia processor with advanced cache mechanismHayakawa, F. / Okano, H. / Suga, A. et al. | 2002
- 217
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Low cost floating point arithmetic unit designSeungchul Kim, / Yongjoo Lee, / Wookyeong Jeong, / Yongsurk Lee, et al. | 2002
- 221
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A new floating-point normalization scheme by bit parallel operation of leading one position valueKyung-Nam Han, / Sang-Wook Han, / Euisik Yoon, et al. | 2002
- 225
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Power efficient MPEG-4 decoder architecture featuring low-complexity error resilienceByun, H.I. / Jeon, M.Y. / Seo, J.Y. / Lee, K.W. / Lee, S.H. / Kang, B.H. et al. | 2002
- 229
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ASIC implementation of a new and efficient wavelet coding algorithmSeonyoung Lee, / Kyeongsoon Cho, et al. | 2002
- 233
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Single chip video segmentation system with a programmable PE arrayShao-Yi Chien, / Yu-Wen Huang, / Bing-Yu Hsieh, / Liang-Gee Chen, et al. | 2002
- 237
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Real-time segmentation architecture of gray-scale/color motion pictures and digital test-chip implementationMorimoto, T. / Harada, Y. / Koide, T. / Mattausch, H.J. et al. | 2002
- 241
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A novel motion estimation algorithm and its VLSI architectureJer Min Jou, / Yeu Horng Shiau, / Bu Ren Zheng, et al. | 2002
- 245
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Analysis and design of CMOS broadband amplifier with dual feedback loopsYu-Chang Chen, / Shey-Shi Lu, et al. | 2002
- 249
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Low noise amplifier circuit for bandpass samplingNakao, M. / Takagi, S. / Fujii, N. et al. | 2002
- 253
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The noise and linearity optimization for a 1.9-GHz CMOS low noise amplifierWei Guo, / Daquan Huang, et al. | 2002
- 259
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Analysis of on-chip spiral inductors using the distributed capacitance modelChia-Hsin Wu, / Chih-Chun Tang, / Shen-Iuan Liu, et al. | 2002
- 263
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A low power, wide operating frequency and high noise immunity half-digital phased-locked loopKuo-Hsing Cheng, / Wei-Bin Yang, et al. | 2002
- 267
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A V-driver Circuit for Lowering Power of Sub-0.1um BusYamashita, T. / Arima, Y. / Ishibashi, K. / IEEE et al. | 2002
- 267
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A V-driver circuit for lowering power of sub-0.1/spl mu/m busYamashita, T. / Arima, Y. / Ishibashi, K. et al. | 2002
- 271
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0.9-V sense-amplifier-based reduced-clock-swing MTCMOS flip-flopsJinn-Shyan Wang, / Hung-Yu Li, et al. | 2002
- 275
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An all-digital PLL clock multiplierOlsson, T. / Nilsson, P. et al. | 2002
- 279
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Delay-difference DLL and its-application on skewed output bufferYa-Lan Tsao, / Ming-Chao Chung, / Shyh-Jye Jou, et al. | 2002
- 283
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High-speed low-complexity implementation for data weighted averaging algorithm [/spl Sigma//spl Delta/ modulator applications]Da-Huei Lee, / Ching-Chung Li, / Tai-Haur Kuo, et al. | 2002
- 283
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High-Speed Low-Complexity Implementation for Data Weighted Averaging AlgorithmLee, D.-H. / Li, C.-C. / Kuo, T.-H. / IEEE et al. | 2002
- 287
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A sub-word parallel digital signal processor for wireless communication systemsYuan-Hao Huang, / Tzi-Dar Chiueh, et al. | 2002
- 291
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A novel block equalization design for wireless communication with ISI and Rayleigh fading channelsYin-Tsung Hwang, / Jing-Yi Liu, / Chi-Cheng Han, / Chien-Hsing Wu, et al. | 2002
- 295
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Design and implementation of a scalable fast Fourier transform coreCheng-Han Sung, / Kun-Bin Lee, / Chein-Wei Jen, et al. | 2002
- 299
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Design and implementation of an acoustic echo cancellerSu An Jang, / You Jin Lee, / Dai Tchul Moon, et al. | 2002
- 303
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A real-time lipreading LSI for word recognitionNakamura, K. / Murakami, N. / Takagi, K. / Takagi, N. et al. | 2002
- 307
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A 0.18-mum CMOS offset-PLL Upconversion Modulation Loop IC for DCS-1800 TransmitterHsu, J.-M. / IEEE et al. | 2002
- 307
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A 0.18-/spl mu/m CMOS offset-PLL upconversion modulation loop IC for DCS-1800 transmitterHsu, J.-M. et al. | 2002
- 311
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A direct-conversion CMOS receiver for 5 GHz wireless LANChia-Wei Wu, / Ming-Chun Su, / Pai-Shan Hsiao, / Kuo-Pin Lan, / Hsu, K.Y.-J. et al. | 2002
- 315
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A 0.35-/spl mu/m SiGe BiCMOS RF front-end IC for TD-SCDMA receiverTz-Heng Fu, / Shin-Fu Chen, / Hsu, J.-M. et al. | 2002
- 315
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A 0.35-mum SiGe BiCMOS RF Front-End IC for TD-SCDMA ReceiverFu, T.-h. / Chen, S.-F. / Hsu, J.-M. / IEEE et al. | 2002
- 319
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A quadrature modulator with enhanced harmonic rejection filterPeng-Un Su, / Hsu, J.-M. et al. | 2002
- 323
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Wideband impedance matched GaInP/GaAs HBT Gilbert micromixer with 12 dB gainCheng-Yu Wang, / Shey-shi Lu, / Meng, C.C. et al. | 2002
- 327
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Automatic Verilog code generation of an 8-bit RISC micro-controllerYun-Tai Husueh, / Wen-Chung Chang, / Jui-Min Lai, et al. | 2002
- 331
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A high performance function generator for multiplier-based arithmetic operationsTso-Bing Juang, / Jeng-Hsin Jan, / Ming-Yu Tsai, / Shen-Fu Hsiao, et al. | 2002
- 335
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Memory synthesis for low power ASIC designWen-Tsong Shiue, et al. | 2002
- 343
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An exact algorithm for practical routing problemsIizuka, T. / Asada, K. et al. | 2002
- 347
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A programmable data background generator for march based memory testingWei-Lun Wang, / Kuen-Jong Lee, et al. | 2002
- 351
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A low-power Reed-Solomon decoder for STM-16 optical communicationsHsie-Chia Chang, / Chien-Ching Lin, / Chen-Yi Lee, et al. | 2002
- 355
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A comma-free Reed-Solomon decoder chip for W-CDMA/FDD applicationsChi-Fang Li, / Chong-Ren Wang, / Yuan-Sun Chu, / Wern-Ho Sheen, et al. | 2002
- 359
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VLSI design of a reconfigurable multi-mode Reed-Solomon codec for high-speed communication systemsHuai-Yi Hsu, / An-Yeu Wu, et al. | 2002
- 363
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A VLSI architecture of DMT based transceiver for VDSL systemChing-Chi Chang, / Muh-Tian Shieu, / Chorng-Kuang Wang, et al. | 2002
- 367
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Design of a DMT-based baseband transceiver for very-high-speed digital subscriber linesChiao-Chih Chang, / Min-Shu Wang, / Tzi-Dar Chiueh, et al. | 2002
- 371
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All digital CDMA upstream transmitter and baseband VLSI design of head-end receiver for upstream cable networksKeng-Yi Su, / Muh-Tain Shieu, / Chorng-Kuang Wang, et al. | 2002
- 375
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Author index| 2002
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2002 IEEE Asia-Pacific Conference on ASIC. Proceedings (Cat. No.02EX547)| 2002