Automatic Synthesis of Interface Circuits from Simplified IP Interface Protocols (English)
- New search for: Yun, C.
- New search for: Bae, Y.
- New search for: Cho, H.
- New search for: Jhang, K.
- New search for: Yun, C.
- New search for: Bae, Y.
- New search for: Cho, H.
- New search for: Jhang, K.
- New search for: Jesshope, C. R.
- New search for: Egan, Colin
In:
ACSAC 2006; Advances in computer systems architecture
4186
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581-587
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2006
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ISBN:
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ISSN:
- Conference paper / Print
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Title:Automatic Synthesis of Interface Circuits from Simplified IP Interface Protocols
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Contributors:Yun, C. ( author ) / Bae, Y. ( author ) / Cho, H. ( author ) / Jhang, K. ( author ) / Jesshope, C. R. / Egan, Colin
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Conference:ACSAC 2006; Advances in computer systems architecture ; 2006 ; Shanghai, China
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Published in:ACSAC 2006; Advances in computer systems architecture , 4186 ; 581-587LECTURE NOTES IN COMPUTER SCIENCE , 4186 ; 581-587
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Publisher:
- New search for: Springer
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Place of publication:Berlin
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Publication date:2006-01-01
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Size:7 pages
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Remarks:Includes bibliographical references and index.
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ISBN:
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ISSN:
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Type of media:Conference paper
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Type of material:Print
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Language:English
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Keywords:
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Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
-
The Era of Multi-core Chips -A Fresh Look on Software ChallengesGao, G. R. et al. | 2006
- 466
-
The New BCD Subtractor and Its Reversible Logic ImplementationThapliyal, H. / Srinivas, M. B. et al. | 2006
- 2
-
Streaming Networks for Coordinating Data-Parallel Programs (Position Statement)Shafarenko, A. et al. | 2006
- 6
-
Implementations of Square-Root and Exponential Functions for Large FPGAsBajger, M. / Omondi, A. R. et al. | 2006
- 24
-
Using Branch Prediction Information for Near-Optimal I-Cache LeakageChung, S. W. / Skadron, K. et al. | 2006
- 38
-
Scientific Computing Applications on the Imagine Stream ProcessorDu, J. / Yang, X. / Wang, G. / Ao, F. et al. | 2006
- 52
-
Enhancing Last-Level Cache Performance by Block Bypassing and Early Miss DeterminationDybdahl, H. / Stenstrom, P. et al. | 2006
- 67
-
A Study of the Performance Potential for Dynamic Instruction Hints SelectionFu, R. / Lu, J. / Zhai, A. / Hsu, W.-C. et al. | 2006
- 81
-
Reorganizing UNIX for ReliabilityHerder, J. N. / Bos, H. / Gras, B. / Homburg, P. / Tanenbaum, A. S. et al. | 2006
- 95
-
Critical-Task Anticipation Scheduling Algorithm for Heterogeneous and Grid ComputingHsu, C.-H. / Own, M.-Y. / Li, K.-C. et al. | 2006
- 109
-
Processor Directed Dynamic Page PolicyHuan, D. / Li, Z. / Hu, W. / Liu, Z. et al. | 2006
- 123
-
Static WCET Analysis Based Compiler-Directed DVS Energy Optimization in Real-Time ApplicationsYi, H. / Chen, J. / Yang, X. et al. | 2006
- 137
-
A Study on Transformation of Self-similar Processes with Arbitrary Marginal DistributionsJeong, H.-D. J. / Lee, J.-S. R. et al. | 2006
- 147
-
muTC - An Intermediate Language for Programming Chip MultiprocessorsJesshope, C. et al. | 2006
- 161
-
Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass DelaysKoh, L. W. / Diessel, O. et al. | 2006
- 175
-
Trace-Based Data Cache Leakage Reduction at Link TimeLi, L. / Xue, J. et al. | 2006
- 189
-
Parallelizing User-Defined and Implicit Reductions Globally on MultiprocessorsLiao, S.-w. et al. | 2006
- 203
-
Overload Protection for Commodity Network AppliancesMacpherson, L. et al. | 2006
- 219
-
An Integrated Temporal Partitioning and Mapping Framework for Handling Custom Instructions on a Reconfigurable Functional UnitMehdipour, F. / Noori, H. / Zamani, M. S. / Murakami, K. / Sedighi, M. / Inoue, K. et al. | 2006
- 231
-
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way ClusterShinozaki, A. / Shima, M. / Guo, M. / Kubo, M. et al. | 2006
- 244
-
Hardware Budget and Runtime System for Data-Driven Multithreaded Chip MultiprocessorStavrou, K. / Trancoso, P. / Evripidou, P. et al. | 2006
- 260
-
Combining Wireless Sensor Network with Grid for Intelligent City TrafficTang, F. / Li, M. / Weng, C. / Zhang, C. / Zhang, W. / Huang, H. / Wang, Y. et al. | 2006
- 270
-
A Novel Processor Architecture for Real-Time ControlWu, X. / Chouliaras, V. / Nunez-Yanez, J. / Goodall, R. / Vladimirova, T. et al. | 2006
- 281
-
A 0-1 Integer Linear Programming Based Approach for Global Locality OptimizationsXia, J. / Luo, L. / Yang, X. et al. | 2006
- 295
-
Design and Analysis of Low Power Image Filters Toward Defect-Resilient Embedded Memories for Multimedia SoCsYi, K. / Jung, K. H. / Cheng, S.-Y. / Park, Y.-H. / Kurdahi, F. / Eltawil, A. et al. | 2006
- 309
-
Entropy Throttling: A Physical Approach for Maximizing Packet Mobility in Interconnection NetworksYokota, T. / Ootsu, K. / Furukawa, F. / Baba, T. et al. | 2006
- 323
-
Design of an Efficient Flexible Architecture for Color Image EnhancementZhang, M. Z. / Tao, L. / Seow, M.-J. / Asari, V. K. et al. | 2006
- 337
-
Hypercube Communications on Optical Chordal Ring Networks with Chord Length of ThreeChen, Y. / Shen, H. / Zhang, H. et al. | 2006
- 344
-
PMPS(3): A Performance Model of Parallel SystemsChen, Y.-r. / Qi, X.-y. / Qian, Y. / Dou, W.-h. et al. | 2006
- 351
-
Issues and Support for Dynamic Register AllocationDas, A. / Fu, R. / Zhai, A. / Hsu, W.-C. et al. | 2006
- 359
-
A Heterogeneous Multi-core Processor Architecture for High Performance ComputingGuo, J. / Dai, K. / Wang, Z. et al. | 2006
- 366
-
Reducing the Branch Power Cost in Embedded Processors Through Static Scheduling, Profiling and SuperBlock FormationHicks, M. / Egan, C. / Christianson, B. / Quick, P. et al. | 2006
- 373
-
Fault-Free Pairwise Independent Hamiltonian Paths on Faulty HypercubesHsieh, S.-Y. et al. | 2006
- 380
-
Constructing Node-Disjoint Paths in Enhanced Pyramid NetworksHsieh, H.-J. / Duh, D.-R. et al. | 2006
- 387
-
Striping Cache: A Global Cache for Striped Network File SystemHung, S.-K. / Hsu, Y. et al. | 2006
- 394
-
DTuplesHPC: Distributed Tuple Space for Desktop High Performance ComputingJiang, Y. / Xue, G. / Li, M. / You, J. et al. | 2006
- 401
-
The Algorithm and Circuit Design of a 400MHz 16-Bit Hybrid MultiplierLi, Z. / Chen, S. / Lei, C. et al. | 2006
- 409
-
Live Range Aware Cache ArchitectureLi, P. / Wang, D. / Guo, S. / Tian, T. / Zheng, W. et al. | 2006
- 416
-
The Challenges of Efficient Code-Generation for Massively Parallel ArchitecturesMcGuiness, J. M. / Egan, C. / Christianson, B. / Gao, G. et al. | 2006
- 423
-
Reliable Systolic Computing Through RedundancyOkuda, K. / Song, S. W. / Yamamoto, M. T. et al. | 2006
- 430
-
A Diversity-Controllable Genetic Algorithm for Optimal Fused Traffic Planning on Sensor NetworksPan, Y. / Lu, X. / Zhu, P. / Ma, S. et al. | 2006
- 437
-
A Context-Switch Reduction Heuristic for Power-Aware Off-Line SchedulingRaveendran, B. / Balasubramaniam, S. / Prasad, K. D. / Gurunarayanan, S. et al. | 2006
- 445
-
On the Reliability of Drowsy Instruction CachesShin, S. H. / Chung, S. W. / Jhon, C. S. et al. | 2006
- 452
-
Design of a Reconfigurable Cryptographic EngineSun, K. / Ping, L. / Wang, J. / Liu, Z. / Pan, X. et al. | 2006
- 459
-
Enhancing ICOUNT2.8 Fetch Policy with Better Fairness for SMT ProcessorsSun, C. / Tang, H. / Zhang, M. et al. | 2006
- 473
-
Power-Efficient Microkernel of Embedded Operating System on ChipChen, T. / Hu, W. / Lian, Y. et al. | 2006
- 480
-
Understanding Prediction Limits Through Unbiased BranchesVintan, L. / Gellert, A. / Florea, A. / Oancea, M. / Egan, C. et al. | 2006
- 488
-
Bandwidth Optimization of the EMCI for a High Performance 32-bit DSPWang, D. / Hu, X. / Chen, S. / Guo, Y. et al. | 2006
- 495
-
Research on Petersen Graphs and Hyper-cubes Connected Interconnection NetworksWang, L. / Chen, Z. et al. | 2006
- 502
-
Cycle Period Analysis and Optimization of Timed CircuitsWang, L. / Wang, Z.-y. / Dai, K. et al. | 2006
- 509
-
Acceleration Techniques for Chip-Multiprocessor Simulator DebugWang, H. / Wang, D. / Li, P. et al. | 2006
- 516
-
A DDL-Based Software Architecture ModelWang, M. / Liu, L. et al. | 2006
- 523
-
Branch Behavior Characterization for Multimedia ApplicationsYang, C.-L. / Wang, S.-Y. / Chen, Y.-J. et al. | 2006
- 531
-
Optimization and Evaluating of StreamYGX2 on MASA Stream ProcessorWen, M. / Wu, N. / Xun, C. / Wu, W. / Zhang, C. et al. | 2006
- 538
-
SecureTorrent: A Security Framework for File SwarmingWilson, K. / Machanick, P. et al. | 2006
- 545
-
Register Allocation on Stream Processor with Local Register FileWu, N. / Wen, M. / Ren, J. / He, Y. / Zhang, C. et al. | 2006
- 552
-
A Self-reconfigurable System-on-Chip Architecture for Satellite On-Board Computer MaintenanceWu, X. / Vladimirova, T. et al. | 2006
- 559
-
Compile-Time Thread Distinguishment Algorithm on VIM-Based ArchitectureXiao-Bo, Y. / Xue-Jun, Y. / Pu, W. et al. | 2006
- 567
-
Designing a Coarse-Grained Reconfigurable Architecture Using Loop Self-PipeliningXu, J. / Wu, G. / Dou, Y. / Dong, Y. et al. | 2006
- 574
-
Low-Power Data Cache Architecture by Address Range Reconfiguration for Multimedia ApplicationsYang, H.-M. / Park, G.-H. / Kim, S.-D. et al. | 2006
- 581
-
Automatic Synthesis of Interface Circuits from Simplified IP Interface ProtocolsYun, C. / Bae, Y. / Cho, H. / Jhang, K. et al. | 2006
- 588
-
An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron MicroprocessorsZhang, C. / Zhou, H. / Zhang, M. / Xing, Z. et al. | 2006
- 595
-
An Efficient Approach to Energy Saving in MicrocontrollersZhao, W. / Xia, F. et al. | 2006