Worst-case communication time analysis of networks-on-chip with shared virtual channels (English)
- New search for: Rambo, Eberle A.
- New search for: Ernst, Rolf
- New search for: Rambo, Eberle A.
- New search for: Ernst, Rolf
In:
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)
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537-542
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2015
- Conference paper / Electronic Resource
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Title:Worst-case communication time analysis of networks-on-chip with shared virtual channels
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Contributors:Rambo, Eberle A. ( author ) / Ernst, Rolf ( author )
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Published in:
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Publisher:
- New search for: IEEE
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Publication date:2015-03-01
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Size:147107 byte
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ISBN:
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Type of media:Conference paper
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Type of material:Electronic Resource
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Language:English
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Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Back matter| 2015
- 1
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Clock domain crossing aware sequential clock gatingLiu, Jianfeng / Hong, Mi-Suk / Do, Kyungtae / Choi, Jung Yun / Park, Jaehong / Kumar, Mohit / Kumar, Manish / Tripathi, Nikhil / Ranjan, Abhishek et al. | 2015
- 1
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Front matter| 2015
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An energy efficient backup scheme with low inrush current for nonvolatile SRAM in energy harvesting sensor nodesLi, Hehe / Liu, Yongpan / Zhao, Qinghang / Gu, Yizi / Sheng, Xiao / Sun, Guangyu / Zhang, Chao / Chang, Meng-Fan / Luo, Rong / Yang, Huazhong et al. | 2015
- 13
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Race to idle or not: Balancing the memory sleep time with DVS for energy minimizationFu, Chenchen / Li, Minming / Xue, Chun Jason et al. | 2015
- 19
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Event-driven and sensorless photovoltaic system reconfiguration for electric vehiclesLin, Xue / Wang, Yanzhi / Pedram, Massoud / Kim, Jaemin / Chang, Naehyuck et al. | 2015
- 25
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Online binding of applications to multiple clock domains in shared FPGA-based systemsSamie, Farzad / Bauer, Lars / Hsieh, Chih-Ming / Henkel, Jorg et al. | 2015
- 31
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Profiling-driven multi-cycling in FPGA high-level synthesisHadjis, Stefan / Canis, Andrew / Sobue, Ryoya / Hara-Azumi, Yuko / Tomiyama, Hiroyuki / Anderson, Jason et al. | 2015
- 37
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Schedulability bound for integrated modular avionics partitionsKim, Jung-Eun / Abdelzaher, Tarek / Sha, Lui et al. | 2015
- 43
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Workload uncertainty characterization and adaptive frequency scaling for energy minimization of embedded systemsDas, Anup / Kumar, Akash / Veeravalli, Bharadwaj / Shafik, Rishad / Merrett, Geoff / Al-Hashimi, Bashir et al. | 2015
- 49
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Formal analysis of the startup delay of SOME/IP service discoverySeyler, Jan R. / Streichert, Thilo / Glas, Michael / Navet, Nicolas / Teich, Jurgen et al. | 2015
- 55
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Analysis of Ethernet-switch traffic shapers for in-vehicle networking applicationsThangamuthu, Sivakumar / Concer, Nicola / Cuijpers, Pieter J. L. / Lukkien, Johan J. et al. | 2015
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Platform-aware dynamic configuration support for efficient text processing on heterogeneous systemPark, Mi Sun / Tickoo, Omesh / Narayanan, Vijaykrishnan / Irwin, Mary Jane / Iyer, Ravi et al. | 2015
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A deblocking filter hardware architecture for the high efficiency video coding standardDiniz, Claudio Machado / Shafique, Muhammad / Dalcin, Felipe Vogel / Bampi, Sergio / Henkel, Jorg et al. | 2015
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MatEx: Efficient transient and peak temperature computation for compact thermal modelsPagani, Santiago / Chen, Jian-Jia / Shafique, Muhammad / Henkel, Jorg et al. | 2015
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Distributed reinforcement learning for power limited many-core system performance optimizationChen, Zhuo / Marculescu, Diana et al. | 2015
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An energy-efficient virtual channel power-gating mechanism for on-chip networksMirhosseini, Amirhossein / Sadrosadati, Mohammad / Fakhrzadehgan, Ali / Modarressi, Mehdi / Sarbazi-Azad, Hamid et al. | 2015
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M-DTM: Migration-based dynamic thermal management for heterogeneous mobile multi-core processorsKim, Young Geun / Kim, Minyong / Kim, Jae Min / Chung, Sung Woo et al. | 2015
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Towards systematic design of 3D pNML layoutsPerricone, Robert / Zhu, Yining / Sanders, Katherine M. / Hu, X. Sharon / Niemier, Michael et al. | 2015
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DESTINY: A tool for modeling emerging 3D NVM and eDRAM cachesPoremba, Matt / Mittal, Sparsh / Li, Dong / Vetter, Jeffrey S. / Xie, Yuan et al. | 2015
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Big-data streaming applications scheduling with online learning and concept drift detectionKanoun, Karim / van der Schaar, Mihaela et al. | 2015
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Design flow and run-time management for compressed FPGA configurationsHuriaux, Christophe / Courtay, Antoine / Sentieys, Olivier et al. | 2015
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Empirical modelling of FDSOI CMOS inverter for signal/power integrity simulationDghais, Wael / Rodriguez, Jonathan et al. | 2015
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On-chip measurement of bandgap reference voltage using a small form factor VCO based zoom-in ADCErol, Osman Emir / Ozev, Sule / Suresh, Chandra / Parekhji, Rubin / Balasubramanian, Lakshmanan et al. | 2015
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Logical equivalence checking of asynchronous circuits using commercial toolsSaifhashemi, Arash / Huang, Hsin-Ho / Bhalerao, Priyanka / Beerel, Peter A. et al. | 2015
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May-happen-in-parallel analysis of ESL models using UPPAAL model checkingChang, Che-Wei / Domer, Rainer et al. | 2015
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Verifying synchronous reactive systems using lazy abstractionMadhukar, Kumar / Srivas, Mandayam / Wachter, Bjorn / Kroening, Daniel / Metta, Ravindra et al. | 2015
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Spintastic: Spin-based stochastic logic for energy-efficient computingVenkatesan, Rangharajan / Venkataramani, Swagath / Fong, Xuanyao / Roy, Kaushik / Raghunathan, Anand et al. | 2015
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Leakage power reduction for deeply-scaled FinFET circuits operating in multiple voltage regimes using fine-grained gate-length biasing techniqueLi, Ji / Xie, Qing / Wang, Yanzhi / Nazarian, Shahin / Pedram, Massoud et al. | 2015
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SubHunter: A high-performance and scalable sub-circuit recognition method with Prüfer-encodingSu, Hong-Yan / Hsu, Chih-Hao / Li, Yih-Lang et al. | 2015
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Timing verification for adaptive integrated circuitsKumar, Rohit / Li, Bing / Shen, Yiren / Schlichtmann, Ulf / Hu, Jiang et al. | 2015
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A robust approach for process variation aware mask optimizationKuang, Jian / Chow, Wing-Kai / Young, Evangeline F. Y. et al. | 2015
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FastTree: A hardware KD-tree construction acceleration engine for real-time ray tracingLiu, Xingyu / Deng, Yangdong / Ni, Yufei / Li, Zonghui et al. | 2015
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Reverse longstaff-schwartz american option pricing on hybrid CPU/FPGA systemsBrugger, Christian / Varela, Javier Alejandro / When, Norbert / Tang, Songyin / Korn, Ralf et al. | 2015
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Accurate electrothermal modeling of thermoelectric generatorsDousti, Mohammad Javad / Petraglia, Antonio / Pedram, Massoud et al. | 2015
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Efficiency-driven design time optimization of a hybrid energy storage system with networked charge transfer interconnectXie, Qing / Kim, Younghyun / Baek, Donkyu / Wang, Yanzhi / Pedram, Massoud / Chang, Naehyuck et al. | 2015
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An ultra-low power dual-mode ECG monitor for healthcare and wellnessBortolotti, Daniele / Mangia, Mauro / Bartolini, Andrea / Rovatti, Riccardo / Setti, Gianluca / Benini, Luca et al. | 2015
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Solving DQBF through quantifier eliminationGitina, Karina / Wimmer, Ralf / Reimer, Sven / Sauer, Matthias / Scholl, Christoph / Becker, Bernd et al. | 2015
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Formal verification of sequential Galois field arithmetic circuits using algebraic geometrySun, Xiaojun / Kalla, Priyank / Pruss, Tim / Enescu, Florian et al. | 2015
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A universal macro block mapping scheme for arithmetic circuitsWei, Xing / Diao, Yi / Lam, Tak-Kei / Wu, Yu-Liang et al. | 2015
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Towards an accurate reliability, availability and maintainability analysis approach for satellite systems based on probabilistic model checkingHoque, Khaza Anuarul / Mohamed, Otmane Ait / Savaria, Yvon et al. | 2015
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An effective triple patterning aware grid-based detailed routing approachLiu, Zhiqing / Liu, Chuangwen / Young, Evangeline F.Y. et al. | 2015
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Simultaneous transistor pairing and placement for CMOS standard cellsLu, Ang / Lu, Hsueh-Ju / Jang, En-Jang / Lin, Yu-Po / Hung, Chun-Hsiang / Chuang, Chun-Chih / Lin, Rung-Bin et al. | 2015
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A TSV noise-aware 3-D placerLee, Yu-Min / Chen, Chun / Song, JiaXing / Pan, Kuan-Te et al. | 2015
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Identifying redundant inter-cell margins and its application to reducing routing congestionChung, Woohyun / Shim, Seongbo / Shin, Youngsoo et al. | 2015
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Models for deterministic execution of real-time multiprocessor applicationsPoplavko, Peter / Socci, Dario / Bourgos, Paraskevas / Bensalem, Saddek / Bozga, Marius et al. | 2015
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Pre-simulation symbolic analysis of synchronization issues between discrete event and timed data flow models of computationAndrade, Liliana / Maehne, Torsten / Vachoux, Alain / Ben Aoun, Cedric / Pecheux, Francois / Louerat, Marie-Minerve et al. | 2015
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Formal consistency checking over specifications in natural languagesYan, Rongjie / Cheng, Chih-Hong / Chai, Yesheng et al. | 2015
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Tackling the bottleneck of delay tables in 3D ultrasound imagingIbrahim, A. / Hager, P. / Bartolini, A. / Angiolini, F. / Arditi, M. / Benini, L. / De Micheli, G. et al. | 2015
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Integrated CMOS receiver for wearable coil arrays in MRI applicationsSporrer, Benjamin / Bettini, Luca / Vogt, Christian / Mehmann, Andreas / Reber, Jonas / Marjanovic, Josip / Brunner, David O. / Burger, Thomas / Pruessmann, Klaas P. / Troster, Gerhard et al. | 2015
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Tactile prosthetics in WiseSkinFarserotu, J. / Decotignie, J-D. / Baborowski, J. / Volpe, P-N / Quiros, C R. / Kopta, V. / Koch, V. / Huang, H. / Li, T. / Enz, C. et al. | 2015
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The next generation of virtual prototyping: Ultra-fast yet accurate simulation of HW/SW systemsBringmann, Oliver / Ecker, Wolfgang / Gerstlauer, Andreas / Goyal, Ajay / Mueller-Gritschneder, Daniel / Sasidharan, Prasanth / Singh, Simranjit et al. | 2015
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Multi/many-core programming: Where are we standing?Castrillon, Jeronimo / Sheng, Weihua / Jessenberger, Ralph / Thiele, Lothar / Schorr, Lars / Juurlink, Ben / Alvarez-Mesa, Mauricio / Pohl, Angela / Reyes, Victor / Leupers, Rainer et al. | 2015
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Memristor based computation-in-memory architecture for data-intensive applicationsHamdioui, Said / Xie, Lei / Nguyen, Hoang Anh Du / Taouil, Mottaqiallah / Bertels, Koen / Corporaal, Henk / Jiao, Hailong / Catthoor, Francky / Wouters, Dirk / Eike, Linn et al. | 2015
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Panel: The future of electronics, semiconductors, and design in EuropeCasale-Rossi, Marco / De Micheli, Giovanni / Bagherli, Jalal / Collette, Thierry / Domic, Antun / Symanzik, Horst / Yassaie, Sir Hossein et al. | 2015