Departments - DATC Newsletter (English)
In:
IEEE design & test of computers
;
18
, 4
; 77
;
2001
-
ISSN:
- Article (Journal) / Print
-
Title:Departments - DATC Newsletter
-
Published in:IEEE design & test of computers ; 18, 4 ; 77
-
Publisher:
- New search for: Soc.
-
Place of publication:Los Alamitos, Calif.
-
Publication date:2001
-
ISSN:
-
ZDBID:
-
Type of media:Article (Journal)
-
Type of material:Print
-
Language:English
- New search for: 54.33 / 54.00
- Further information on Basic classification
- New search for: 770/3155
-
Keywords:
-
Classification:
-
Source:
Table of contents – Volume 18, Issue 4
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 2
-
Departments - EIC Message| 2001
- 4
-
Formal verification of commercial integrated circuitsPixley, C. et al. | 2001
- 4
-
Features - Guest Editor's Introduction: Formal Verification of Commercial Integrated CircuitsPixley, Carl et al. | 2001
- 6
-
Features - Applied Boolean Equivalence Verification and RTL Static Sign-OffFoster, Harry et al. | 2001
- 6
-
Applied Boolean equivalence verification and RTL static sign-offFoster, H. et al. | 2001
- 16
-
Features - Practical Formal Verification in Microprocessor DesignJones, Robert B. et al. | 2001
- 16
-
Practical formal verification in microprocessor designJones, R.B. / O'Leary, J.W. / Seger, C.-J.H. / Aagaard, M.D. / Melham, T.F. et al. | 2001
- 26
-
Design and development paradigm for industrial formal verification CAD toolsKrishnamurthy, N. / Abadir, M.S. / Martin, A.K. / Abraham, J.A. et al. | 2001
- 26
-
Features - Design and Development Paradigm for Industrial Formal verification CAD ToolsKrishnamurthy, Narayanan et al. | 2001
- 36
-
Features - Coverage Metrics for Functional Validation of Hardware DesignsTasiran, Serdar et al. | 2001
- 36
-
Coverage metrics for functional validation of hardware designsTasiran, S. / Keutzer, K. et al. | 2001
- 46
-
Special Features - Optimizing Multiple EDA Tools within the ASIC Design FlowBening, Lionel et al. | 2001
- 46
-
Optimizing multiple EDA tools within the ASIC design flowBening, L. / Foster, H. et al. | 2001
- 56
-
Special Features - A Two-Input, One-Output Bit-Scalable Architecture for Fuzzy Processorsd'Amore, Roberto et al. | 2001
- 56
-
A two-input, one-output bit-scalable architecture for fuzzy processorsD'Amore, R. / Saotome, O. / Kienitz, K.H. et al. | 2001
- 65
-
Departments - Roundtable| 2001
- 72
-
Departments - Conference Reports| 2001
- 73
-
Departments - Panel Summaries| 2001
- 77
-
Departments - DATC Newsletter| 2001
- 78
-
Departments - TTTC Newsletter| 2001
- 80
-
Departments - The Last Byte| 2001