Advanced SystemC Tracing and Analysis Framework for Extra-Functional Properties (English)
- New search for: Hartmann, Philipp A.
- New search for: Grüttner, Kim
- New search for: Nebel, Wolfgang
- New search for: Sano, Kentaro
- New search for: Soudris, Dimitrios
- New search for: Hübner, Michael
- New search for: Diniz, Pedro C.
- New search for: Hartmann, Philipp A.
- New search for: Grüttner, Kim
- New search for: Nebel, Wolfgang
In:
Applied Reconfigurable Computing
: 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings
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Chapter: 12
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141-152
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2015
- Article/Chapter (Book) / Electronic Resource
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Title:Advanced SystemC Tracing and Analysis Framework for Extra-Functional Properties
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Additional title:Lect.Notes Computer
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Contributors:Sano, Kentaro ( editor ) / Soudris, Dimitrios ( editor ) / Hübner, Michael ( editor ) / Diniz, Pedro C. ( editor ) / Hartmann, Philipp A. ( author ) / Grüttner, Kim ( author ) / Nebel, Wolfgang ( author )
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Conference:International Symposium on Applied Reconfigurable Computing ; 2015 ; Bochum, Germany
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Published in:Applied Reconfigurable Computing : 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings ; Chapter: 12 ; 141-152Lecture Notes in Computer Science ; 9040 ; 141-152
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Publisher:
- New search for: Springer International Publishing
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Place of publication:Cham
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Publication date:2015-03-31
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Size:12 pages
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ISBN:
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ISSN:
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DOI:
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Type of media:Article/Chapter (Book)
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Type of material:Electronic Resource
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Language:English
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Keywords:
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Source:
Table of contents eBook
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Reducing Storage Costs of Reconfiguration Contexts by Sharing Instruction Memory Cache BlocksBiazus, Thiago Baldissera / Rutzig, Mateus Beck et al. | 2015
- 2
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A Vector Caching Scheme for Streaming FPGA SpMV AcceleratorsUmuroglu, Yaman / Jahre, Magnus et al. | 2015
- 3
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Hierarchical Dynamic Power-Gating in FPGAsAhmed, Rehan / Wilton, Steven J. E. / Hallschmid, Peter / Klukas, Richard et al. | 2015
- 4
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Hardware Synthesis from Functional Embedded Domain-Specific Languages: A Case Study in Regular Expression CompilationGraves, Ian / Procter, Adam / Harrison, William L. / Becchi, Michela / Allwein, Gerard et al. | 2015
- 5
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ArchHDL: A Novel Hardware RTL Design Environment in C++Sato, Shimpei / Kise, Kenji et al. | 2015
- 6
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Operand-Value-Based Modeling of Dynamic Energy Consumption of Soft Processors in FPGAAl-Khatib, Zaid / Abdi, Samar et al. | 2015
- 7
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Preemptive Hardware Multitasking in ReconOSHappe, Markus / Traber, Andreas / Keller, Ariane et al. | 2015
- 8
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A Fully Parallel Particle Filter Architecture for FPGAsSchwiegelshohn, Fynn / Ossovski, Eugen / Hübner, Michael et al. | 2015
- 9
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TEAChER: TEach AdvanCEd Reconfigurable Architectures and ToolsSiozios, Kostas / Figuli, Peter / Sidiropoulos, Harry / Tradowsky, Carsten / Diamantopoulos, Dionysios / Maragos, Konstantinos / Delicia, Shalina Percy / Soudris, Dimitrios / Becker, Jürgen et al. | 2015
- 10
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Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator ArchitecturesDiamantopoulos, Dionysios / Xydis, S. / Siozios, K. / Soudris, D. et al. | 2015
- 11
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SET-PAR: Place and Route Tools for the Mitigation of Single Event Transients on Flash-Based FPGAsSterpone, Luca / Du, Boyang et al. | 2015
- 12
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Advanced SystemC Tracing and Analysis Framework for Extra-Functional PropertiesHartmann, Philipp A. / Grüttner, Kim / Nebel, Wolfgang et al. | 2015
- 13
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Run-Time Partial Reconfiguration Simulation Framework Based on Dynamically Loadable ComponentsPeña, Xerach / Rincon, Fernando / Dondo, Julio / Caba, Julian / Lopez, Juan Carlos et al. | 2015
- 14
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Architecture Virtualization for Run-Time Hardware Multithreading on Field Programmable Gate ArraysMetzner, Michael / Lizarraga, Jesus A. / Bobda, Christophe et al. | 2015
- 15
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Centralized and Software-Based Run-Time Traffic Management Inside Configurable Regions of Interest in Mesh-Based Networks-on-ChipGorski, Philipp / Wegner, Tim / Timmermann, Dirk et al. | 2015
- 16
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Survey on Real-Time Network-on-Chip ArchitecturesHesham, Salma / Rettkowski, Jens / Göhringer, Diana / Abd El Ghany, Mohamed A. et al. | 2015
- 17
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Efficient SR-Latch PUFHabib, Bilal / Kaps, Jens-Peter / Gaj, Kris et al. | 2015
- 18
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Hardware Benchmarking of Cryptographic Algorithms Using High-Level Synthesis Tools: The SHA-3 Contest Case StudyHomsirikamol, Ekawat / Gaj, Kris et al. | 2015
- 19
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Dual CLEFIA/AES Cipher Core on FPGAResende, João Carlos / Chaves, Ricardo et al. | 2015
- 20
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An Efficient and Flexible FPGA Implementation of a Face Detection SystemFekih, Hichem Ben / Elhossini, Ahmed / Juurlink, Ben et al. | 2015
- 21
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A Flexible Software Framework for Dynamic Task Allocation on MPSoCs Evaluated in an Automotive ContextRettkowski, Jens / Wehner, Philipp / Schülper, Marc / Göhringer, Diana et al. | 2015
- 22
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A Dynamically Reconfigurable Mixed Analog-Digital Filter BankNakahara, Hiroki / Yoshida, Hideki / Shioya, Shin-ich / Mikami, Renji / Sasao, Tsutomu et al. | 2015
- 23
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The Effects of System Hyper Pipelining on Three Computational Benchmarks Using FPGAsStrauch, Tobias et al. | 2015
- 24
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A Timing Driven Cycle-Accurate Simulation for Coarse-Grained Reconfigurable ArchitecturesChattopadhyay, Anupam / Chen, Xiaolin et al. | 2015
- 25
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Scalable and Efficient Linear Algebra Kernel Mapping for Low Energy Consumption on the Layers CGRARákossy, Zoltán Endre / Stengele, Dominik / Acosta-Aponte, Axel / Chafekar, Saumitra / Bientinesi, Paolo / Chattopadhyay, Anupam et al. | 2015
- 26
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A Novel Concept for Adaptive Signal Processing on Reconfigurable HardwareFiguli, Peter / Tradowsky, Carsten / Martinez, Jose / Sidiropoulos, Harry / Siozios, Kostas / Stenschke, Holger / Soudris, Dimitrios / Becker, Jürgen et al. | 2015
- 27
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Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC ArchitecturesSotiriou-Xanthopoulos, Efstathios / Diamantopoulos, Dionysios / Economakos, George et al. | 2015
- 28
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Measuring Failure Probability of Coarse and Fine Grain TMR Schemes in SRAM-based FPGAs Under Neutron-Induced EffectsTambara, Lucas A. / Almeida, Felipe / Rech, Paolo / Kastensmidt, Fernanda L. / Bruni, Giovanni / Frost, Christopher et al. | 2015
- 29
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Modular Acquisition and Stimulation System for Timestamp-Driven Neuroscience ExperimentsMatias, Paulo / Guariento, Rafael T. / de Almeida, Lirio O. B. / Slaets, Jan F. W. et al. | 2015
- 30
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DRAM Row Activation Energy Optimization for Stride Memory Access on FPGA-Based SystemsChen, Ren / Prasanna, Viktor K. et al. | 2015
- 31
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Acceleration of Data Streaming Classification using Reconfigurable TechnologyGiakoumakis, Pavlos / Chrysos, Grigorios / Dollas, Apostolos / Papaefstathiou, Ioannis et al. | 2015
- 32
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On-The-Fly Verification of Reconfigurable Image Processing Modules Based on a Proof-Carrying Hardware ApproachWiersema, Tobias / Wu, Sen / Platzner, Marco et al. | 2015
- 33
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Partial Reconfiguration for Dynamic Mapping of Task Graphs onto 2D Mesh PlatformMoghaddam, Mansureh S. / Balakrishnan, M. / Paul, Kolin et al. | 2015
- 34
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A Challenge of Portable and High-Speed FPGA AcceleratorUsui, Takuma / Kobayashi, Ryohei / Kise, Kenji et al. | 2015
- 35
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Total Ionizing Dose Effects of Optical Components on an Optically Reconfigurable Gate ArrayMoriwaki, Retsu / Ito, Hiroyuki / Akagi, Kouta / Watanabe, Minoru / Ogiwara, Akifumi et al. | 2015
- 36
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Exploring Dynamic Reconfigurable CORDIC Co-Processors Tightly Coupled with a VLIW-SIMD Soft-Processor ArchitectureNolting, Stephan / Payá-Vayá, Guillermo / Giesemann, Florian / Blume, Holger et al. | 2015
- 37
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Mesh of Clusters FPGA Architectures: Exploration Methodology and Interconnect OptimizationChtourou, Sonda / Marrakchi, Zied / Pangracious, Vinod / Amouri, Emna / Mehrez, Habib / Abid, Mohamed et al. | 2015
- 38
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DyAFNoC: Dynamically Reconfigurable NoC Characterization Using a Simple Adaptive Deadlock-Free Routing Algorithm with a Low Implementation CostCastillo, Ernesto / Miorandi, Gabriele / Bertozzi, Davide / Jiang Chau, Wang et al. | 2015
- 39
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A Flexible Multilayer Perceptron Co-processor for FPGAsAklah, Zeyad / Andrews, David et al. | 2015
- 40
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Reconfigurable Hardware Assist for Linux Process Scheduling in Heterogeneous Multicore SoCsBueno, Maikon / Almeida, Carlos R. P. / de Holanda, José A. M. / Marques, Eduardo et al. | 2015
- 41
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Towards Performance Modeling of 3D Memory Integrated FPGA ArchitecturesSingapura, Shreyas G. / Panangadan, Anand / Prasanna, Viktor K. et al. | 2015
- 42
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Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDLTakamaeda-Yamazaki, Shinya et al. | 2015
- 43
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Towards Unification of Accelerated Computing and Interconnection For Extreme-Scale ComputingHanawa, Toshihiro / Kodama, Yuetsu / Boku, Taisuke / Amano, Hideharu / Murai, Hitoshi / Umemura, Masayuki / Sato, Mitsuhisa et al. | 2015
- 44
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SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable PlatformsLentaris, George / Stamoulias, Ioannis / Diamantopoulos, Dionysios / Maragos, Konstantinos / Siozios, Kostas / Soudris, Dimitrios / Rodrigalvarez, Marcos Aviles / Lourakis, Manolis / Zabulis, Xenophon / Kostavelis, Ioannis et al. | 2015
- 45
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Hardware Task Scheduling for Partially Reconfigurable FPGAsCharitopoulos, George / Koidis, Iosif / Papadimitriou, Kyprianos / Pnevmatikatos, Dionisios et al. | 2015
- 46
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SWAN-iCARE Project: On the Efficiency of FPGAs Emulating Wearable Medical Devices for Wound Management and MonitoringTsoutsouras, Vasileios / Xydis, Sotirios / Soudris, Dimitrios / Lymperopoulos, Leonidas et al. | 2015
- 47
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DynamIA: Dynamic Hardware Reconfiguration in Industrial ApplicationsMentens, Nele / Vandorpe, Jochen / Vliegen, Jo / Braeken, An / da Silva, Bruno / Touhafi, Abdellah / Kern, Alois / Knappmann, Stephan / Rettkowski, Jens / Kadi, Muhammed Soubhi Al et al. | 2015
- 48
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Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO PerspectiveAntonopoulos, Christos / Keramidas, Georgios / Voros, Nikolaos S. / Hübner, Michael / Göhringer, Diana / Dagioglou, Maria / Giannakopoulos, Theodore / Konstantopoulos, Stasinos / Karkaletsis, Vangelis et al. | 2015
- 49
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Reconfigurable Computing for Analytics Acceleration of Big Bio-Data: The AEGLE ApproachRaptopoulos, Andreas / Xydis, Sotirios / Soudris, Dimitrios et al. | 2015
- 50
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COSSIM : A Novel, Comprehensible, Ultra-Fast, Security-Aware CPS SimulatorPapaefstathiou, Ioannis / Chrysos, Gregory / Sarakis, Lambros et al. | 2015