An efficient low-cost FPGA implementation of a configurable motion estimation for H.264 video coding (English)
- New search for: Elhamzi, Wajdi
- New search for: Dubois, Julien
- New search for: Miteran, Johel
- New search for: Atri, Mohamed
- New search for: Elhamzi, Wajdi
- New search for: Dubois, Julien
- New search for: Miteran, Johel
- New search for: Atri, Mohamed
In:
Journal of Real-Time Image Processing
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9
, 1
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19-30
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2012
- Article (Journal) / Electronic Resource
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Title:An efficient low-cost FPGA implementation of a configurable motion estimation for H.264 video coding
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Contributors:Elhamzi, Wajdi ( author ) / Dubois, Julien ( author ) / Miteran, Johel ( author ) / Atri, Mohamed ( author )
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Published in:Journal of Real-Time Image Processing ; 9, 1 ; 19-30
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Publisher:
- New search for: Springer Berlin Heidelberg
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Place of publication:Berlin/Heidelberg
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Publication date:2012-09-05
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Size:12 pages
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ISSN:
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DOI:
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Type of media:Article (Journal)
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Type of material:Electronic Resource
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Language:English
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Keywords:
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Source:
Table of contents – Volume 9, Issue 1
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Special issue on design and architectures of real-time image processing in embedded systemsChillet, Daniel / Hübner, Michael et al. | 2014
- 5
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An efficient parallelization technique for x264 encoder on heterogeneous platforms consisting of CPUs and GPUsKo, Youngsub / Yi, Youngmin / Ha, Soonhoi et al. | 2013
- 19
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An efficient low-cost FPGA implementation of a configurable motion estimation for H.264 video codingElhamzi, Wajdi / Dubois, Julien / Miteran, Johel / Atri, Mohamed et al. | 2012
- 31
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Modified stable Euler-number algorithm implementation for real-time image binarizationAbbasi, Naeem / Athow, Jacques / Amer, Aishy et al. | 2013
- 47
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Flexible VLIW processor based on FPGA for efficient embedded real-time image processingBrost, Vincent / Yang, Fan / Meunier, Charles et al. | 2013
- 61
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Real-time background generation and foreground object segmentation for high-definition colour video stream in FPGA deviceKryjak, Tomasz / Komorkiewicz, Mateusz / Gorgon, Marek et al. | 2012
- 79
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Efficient algorithm for automatic road sign recognition and its hardware implementationSouani, Chokri / Faiedh, Hassene / Besbes, Kamel et al. | 2013
- 95
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A hardware solution for real-time intelligent fingerprint acquisitionArjona, Rosario / Baturone, Iluminada et al. | 2012
- 111
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In situ image processing capabilities of ARM-based micro-controllersTaysi, Z. Cihan / Yavuz, A. Gokhan / Guvensan, M. Amac / Karsligil, M. Elif et al. | 2012
- 127
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VLSI implementation of star detection and centroid calculation algorithms for star tracking applicationsAzizabadi, Mohsen / Behrad, Alireza / Ghaznavi-Ghoushchi, M. B. et al. | 2012
- 141
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High performance implementation of texture features extraction algorithms using FPGA architectureAkoushideh, Ali Reza / Shahbahrami, Asadollah / Maybodi, Babak Mazloom-Nezhad et al. | 2012
- 159
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A comprehensive comparison of GPU- and FPGA-based acceleration of reflection image reconstruction for 3D ultrasound computer tomographyBirk, Matthias / Zapf, Michael / Balzer, Matthias / Ruiter, Nicole / Becker, Jürgen et al. | 2012
- 171
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On-chip semidense representation map for dense visual features driven by attention processesGranados, Sara / Barranco, Francisco / Mota, Sonia / Díaz, Javier / Ros, Eduardo et al. | 2013
- 187
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Hardware–software optimizations of reconfigurable multi-core processors for floating-point computations of large sparse matricesWang, Xiaofang et al. | 2012
- 205
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Real-time detection of lines using parallel coordinates and CUDAHavel, Jiří / Dubská, Markéta / Herout, Adam / Jošth, Radovan et al. | 2012
- 217
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Efficient implementation of data flow graphs on multi-gpu clustersBoulos, Vincent / Huet, Sylvain / Fristot, Vincent / Salvo, Luc / Houzet, Dominique et al. | 2012
- 233
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The multi-dataflow composer tool: generation of on-the-fly reconfigurable platformsPalumbo, Francesca / Carta, Nicola / Pani, Danilo / Meloni, Paolo / Raffo, Luigi et al. | 2012
- 251
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High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platformsBezati, Endri / Thavot, Richard / Roquier, Ghislain / Mattavelli, Marco et al. | 2013
- 263
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A practical evaluation of the performance of the Impulse CoDeveloper HLS tool for implementing large-kernel 2-D filtersColodro-Conde, Carlos / Toledo-Moreo, F. Javier / Toledo-Moreo, Rafael / Martínez-Álvarez, J. Javier / Garrigós-Guerrero, Javier / Ferrández-Vicente, J. Manuel et al. | 2013
- 281
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Performance evaluation of an automotive distributed architecture based on a high speed power line communication protocol using a transaction level modeling approachMajdoub, Takieddine / Le Nours, Sébastien / Pasquier, Olivier / Nouvel, Fabienne et al. | 2013