A general greedy channel routing algorithm (English)
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In:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
;
10
, 2
;
204-211
;
1991
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ISSN:
- Article (Journal) / Print
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Title:A general greedy channel routing algorithm
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Additional title:Ein allgemeiner Kanal-Routing-Algorithmus
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Contributors:
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Published in:
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Publisher:
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Publication date:1991
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Size:8 Seiten, 29 Quellen
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ISSN:
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DOI:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
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Keywords:
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Source:
Table of contents – Volume 10, Issue 2
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 145
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A parasitics extraction and network reduction algorithm for analog VLSIPong, T.S. / Brooke, M.A. et al. | 1991
- 150
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A macromodeling algorithm for analog circuitsCasinovi, G. / Sangiovanni-Vincentelli, A. et al. | 1991
- 161
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A submicrometer MOS transistor I-V model for circuit simulationMasuda, H. / Mano, J.I. / Ikematsu, R. / Sugihara, H. / Aoki, Y. et al. | 1991
- 171
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Sensitivity computation in piecewise approximate circuit simulationFeldmann, P. / Nguyen, T.V. / Director, S.W. / Rohrer, R.A. et al. | 1991
- 184
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Scheduling blocks of hierarchical compiled simulation of combinational circuitsMaurer, P.M. et al. | 1991
- 193
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An adaptation of the interior point method for solving the global routing problemVannelli, A. et al. | 1991
- 204
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A general greedy channel routing algorithmHo, T.T. / Iyengar, S.S. / Zheng, S.Q. et al. | 1991
- 212
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A robust channel routerYoeli, U. et al. | 1991
- 220
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Symbolic generation of constrained random logic cellsCosta, R. / Curatelli, F. / Caviglia, D.D. / Bisio, G.M. et al. | 1991
- 232
-
Solution of the hydrodynamic device model using high-order nonoscillatory shock capturing algorithmsFatemi, E. / Jerome, J. / Osher, S. et al. | 1991
- 245
-
Numerical simulator for superconducting integrated circuitsRollins, J.G. et al. | 1991
- 252
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A Markov chain-based yield formula for VLSI fault-tolerant chipsCiciani, B. / Iazeolla, G. et al. | 1991
- 260
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Iterative algorithms for computing aliasing probabilitiesIvanov, A. / Starke, C.W. / Agarwal, V.K. / Daehn, W. / Gruetzner, M. / Williams, T.W. et al. | 1991
- 265
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A fault model for PLAsLigthart, M.M. / Stans, R.J. et al. | 1991
- 271
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On river routing with minimum number of jogsTuan, T.C. / Teo, K.H. et al. | 1991
- 273
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Estimating the minimum of partitioning and floorplanning problemsSastry, S. / Pi, J.I. et al. | 1991