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A 0.25-mm 3.0-V 1T1C 32-Mb Nonvolatiole Ferroelectric RAM With Address Transition Detector and Current Forcing Latch Sense Amplifier Scheme
Online Contents | 2002|Contributors: Jeon, B.-G., Kim, H.-H., Kim, K. -
A 1.0 Gb-s BiCMOS Multi-channel Optical Interface Transmitter and Receiver Chip Set for High Resolution Digital Displays
Online Contents | 2001|Contributors: Kim, Y.S., Kim, S. -
A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based Stacking
Online Contents | 2012|Contributors: Kim, J-G, Kim, S-Y, Kim, H -
A 1.2-V 12-b 120-MS-s SHA-Free Dual-Channel Nyquist ADC Based on Midcode Calibration
Online Contents | 2009|Contributors: Kim, Y.-J., Ahn, G.-C. -
A 2.7-V SiGe HBT Variable Gain Amplifier for CDMA Applications
Online Contents | 2003|Contributors: Kim, Y.-G. -
A 3.3-V Single Power Supply 16-Mb Nonvolatile Virtual DRAM Using a NAND Flash Memory Technology
Online Contents | 1997|Contributors: Kim, M.-J., Kim, S.-H., Lee, D.-G. -
A 4 Farad high energy electrochemical double layer capacitor prototype operating at 3.2 V (IES prototype)
Online Contents | 2016|Contributors: Kim, G.-T -
A 5.25 GHz Image Rejection RF Front-End Receiver With Polyphase Filters
Online Contents | 2006|Contributors: Lee, S.-G. -
A 7 Gb/s/pin 1 Gbit GDDR5 SDRAM With 2.5 ns Bank to Bank Active Time and No Bank Group Restriction
Online Contents | 2011|Contributors: Kim, D-H, Kim, D-M, Kim, H-R, Kim, H-J, Kim, J-H, Kim, J-K, Kim, Y-S, Kim, B-C, Moon, G-S, Park, C-G -
A 10-Mbps 0.8-pJ/bit Referenceless Clock and Data Recovery Circuit for Optically Controlled Neural Interface System
Online Contents | 2013|Contributors: Hong, G-M, Kim, S -
A 20 Gb-s 1:4 DEMUX Without Inductors and Low-Power Divide-by-2 Circuit in 0.13 mm CMOS Technology
Online Contents | 2008|Contributors: Kim, L.-S. -
A 24-GHz CMOS UWB Radar Transmitter With Compressed Pulses
Online Contents | 2012|Contributors: Pyo, G, Kim, C-Y -
A 31 ns Random Cycle VCAT-Based 4F2 DRAM With Manufacturability and Enhanced Cell Efficiency
Online Contents | 2010|Contributors: Kim, J-Y, Kim, S, Kim, H, Kim, K, Kim, W-S, Jin, G-Y, Kim, C -
A 32-Bank 1 Gb Self-Strobing Synchronous DRAM with 1 GByte-s Bandwidth
Online Contents | 1996|Contributors: Kim, C.-H., Kim, J.-H., Kim, K.-Y., Park, J.-G., Kim, K.-N. -
A 36 fps SXGA 3-D Display Processor Embedding a Programmable 3-D Graphics Rendering Engine
Online Contents | 2008|Contributors: Kim, D., Lee, Y.-G., Kim, L.-S. -
A 44-46-GHz 16-Element SiGe BiCMOS High-Linearity Transmit/Receive Phased Array
Online Contents | 2012|Contributors: Rebeiz, G M -
A 45 GHz CMOS VCO Adopting Digitally Switchable Metal-Oxide-Metal Capacitors
Online Contents | 2011|Contributors: Kim, S-K, Kim, S-Y, Kim, B-S -
A 60-GHz Push-Push InGaP HBT VCO With Dynamic Frequency Divider
Online Contents | 2005|Contributors: Kim, J.-G.
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